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| author | Kuan-Yi Li <kyli@abysm.org> | 2020-11-20 20:11:23 +0800 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2020-12-01 21:59:30 +0100 |
| commit | f1525e785e9359bfc34b1362ccf37aca48968028 (patch) | |
| tree | 658d12aaac7c421827294917f9cfce0be55fd922 /target/linux/layerscape/patches-4.14/812-flexspi-support-layerscape.patch | |
| parent | c72b7a4f0d8d476df5fb0f9d6a2ad8fadb223025 (diff) | |
| download | openwrt-f1525e785e9359bfc34b1362ccf37aca48968028.tar.gz openwrt-f1525e785e9359bfc34b1362ccf37aca48968028.tar.bz2 openwrt-f1525e785e9359bfc34b1362ccf37aca48968028.zip | |
kernel: backport GD25Q256 support from 4.15
Backport below changes for GigaDevice GD25Q256 support from v4.15:
e27072851bf7 mtd: spi-nor: add a quad_enable callback in struct flash_info
65153846b18c mtd: spi-nor: add support for GD25Q256
This chip is used on newer Quad-E4G boards.
Before:
[ 2.366493] m25p80 spi0.0: unrecognized JEDEC id bytes: c8, 40, 19
[ 2.372853] m25p80: probe of spi0.0 failed with error -2
After:
[ 2.371722] m25p80 spi0.0: gd25q256 (32768 Kbytes)
[ 2.376694] 5 fixed-partitions partitions found on MTD device spi0.0
[ 2.383043] Creating 5 MTD partitions on "spi0.0":
[ 2.387824] 0x000000000000-0x000000030000 : "u-boot"
[ 2.394138] 0x000000030000-0x000000031000 : "u-boot-env"
[ 2.400608] 0x000000031000-0x000000040000 : "config"
[ 2.406830] 0x000000040000-0x000000050000 : "factory"
[ 2.413169] 0x000000050000-0x000002000000 : "firmware"
Signed-off-by: Kuan-Yi Li <kyli@abysm.org>
Diffstat (limited to 'target/linux/layerscape/patches-4.14/812-flexspi-support-layerscape.patch')
| -rw-r--r-- | target/linux/layerscape/patches-4.14/812-flexspi-support-layerscape.patch | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/target/linux/layerscape/patches-4.14/812-flexspi-support-layerscape.patch b/target/linux/layerscape/patches-4.14/812-flexspi-support-layerscape.patch index 5b50f11a8b..bd8620f097 100644 --- a/target/linux/layerscape/patches-4.14/812-flexspi-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.14/812-flexspi-support-layerscape.patch @@ -1504,7 +1504,7 @@ Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> +MODULE_LICENSE("GPL v2"); --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -269,6 +269,7 @@ static inline int set_4byte(struct spi_n +@@ -271,6 +271,7 @@ static inline int set_4byte(struct spi_n u8 cmd; switch (JEDEC_MFR(info)) { @@ -1512,7 +1512,7 @@ Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> case SNOR_MFR_MICRON: /* Some Micron need WREN command; all will accept it */ need_wren = true; -@@ -1044,7 +1045,7 @@ static const struct flash_info spi_nor_i +@@ -1054,7 +1055,7 @@ static const struct flash_info spi_nor_i { "mx66l1g45g", INFO(0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) }, @@ -1521,7 +1521,7 @@ Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> { "n25q016a", INFO(0x20bb15, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_QUAD_READ) }, { "n25q032", INFO(0x20ba16, 0, 64 * 1024, 64, SPI_NOR_QUAD_READ) }, { "n25q032a", INFO(0x20bb16, 0, 64 * 1024, 64, SPI_NOR_QUAD_READ) }, -@@ -1059,6 +1060,12 @@ static const struct flash_info spi_nor_i +@@ -1069,6 +1070,12 @@ static const struct flash_info spi_nor_i { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, @@ -1534,7 +1534,7 @@ Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> /* PMC */ { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) }, { "pm25lv010", INFO(0, 0, 32 * 1024, 4, SECT_4K_PMC) }, -@@ -2436,6 +2443,7 @@ static int spi_nor_init_params(struct sp +@@ -2446,6 +2453,7 @@ static int spi_nor_init_params(struct sp params->quad_enable = macronix_quad_enable; break; @@ -1542,7 +1542,7 @@ Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> case SNOR_MFR_MICRON: break; -@@ -2754,7 +2762,8 @@ int spi_nor_scan(struct spi_nor *nor, co +@@ -2773,7 +2781,8 @@ int spi_nor_scan(struct spi_nor *nor, co mtd->_read = spi_nor_read; /* NOR protection support for STmicro/Micron chips and similar */ |