From 438dc549361ddc992edb8dd6bd0feb096eddab89 Mon Sep 17 00:00:00 2001 From: Zoltan HERPAI Date: Wed, 17 Apr 2024 13:47:02 +0200 Subject: sunxi: 6.6: remove upstreamed patches Remove patches that have been upstreamed. Signed-off-by: Zoltan HERPAI --- ...t-bindings-usb-Add-H616-compatible-string.patch | 38 --- ...-Add-special-clock-for-Allwinner-H616-PHY.patch | 79 ------ ....2-arm64-dts-allwinner-h616-Add-USB-nodes.patch | 188 ------------- ...winner-h616-OrangePi-Zero-2-Add-USB-nodes.patch | 81 ------ ...-allwinner-h616-Split-Orange-Pi-Zero-2-DT.patch | 305 --------------------- ...-allwinner-h616-Add-OrangePi-Zero-3-board.patch | 140 ---------- ...-allwinner-h616-update-emac-for-Orange-Pi.patch | 57 ---- 7 files changed, 888 deletions(-) delete mode 100644 target/linux/sunxi/patches-6.6/001-v6.2-dt-bindings-usb-Add-H616-compatible-string.patch delete mode 100644 target/linux/sunxi/patches-6.6/002-v6.2-dt-bindings-phy-Add-special-clock-for-Allwinner-H616-PHY.patch delete mode 100644 target/linux/sunxi/patches-6.6/003-v6.2-arm64-dts-allwinner-h616-Add-USB-nodes.patch delete mode 100644 target/linux/sunxi/patches-6.6/004-v6.2-arm64-dts-allwinner-h616-OrangePi-Zero-2-Add-USB-nodes.patch delete mode 100644 target/linux/sunxi/patches-6.6/005-v6.6-arm64-dts-allwinner-h616-Split-Orange-Pi-Zero-2-DT.patch delete mode 100644 target/linux/sunxi/patches-6.6/006-v6.6-arm64-dts-allwinner-h616-Add-OrangePi-Zero-3-board.patch delete mode 100644 target/linux/sunxi/patches-6.6/007-v6.7-arm64-dts-allwinner-h616-update-emac-for-Orange-Pi.patch (limited to 'target') diff --git a/target/linux/sunxi/patches-6.6/001-v6.2-dt-bindings-usb-Add-H616-compatible-string.patch b/target/linux/sunxi/patches-6.6/001-v6.2-dt-bindings-usb-Add-H616-compatible-string.patch deleted file mode 100644 index c24d479534..0000000000 --- a/target/linux/sunxi/patches-6.6/001-v6.2-dt-bindings-usb-Add-H616-compatible-string.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 28a1a6474c5053bae01bd29946b4d5ede539176b Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Mon, 31 Oct 2022 11:13:52 +0000 -Subject: [PATCH] dt-bindings: usb: Add H616 compatible string - -The Allwinner H616 contains four fully OHCI/EHCI compatible USB host -controllers, so just add their compatible strings to the list of -generic OHCI/EHCI controllers. - -Signed-off-by: Andre Przywara -Acked-by: Krzysztof Kozlowski -Link: https://lore.kernel.org/r/20221031111358.3387297-2-andre.przywara@arm.com -Signed-off-by: Jernej Skrabec ---- - Documentation/devicetree/bindings/usb/generic-ehci.yaml | 1 + - Documentation/devicetree/bindings/usb/generic-ohci.yaml | 1 + - 2 files changed, 2 insertions(+) - ---- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml -+++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml -@@ -30,6 +30,7 @@ properties: - - allwinner,sun4i-a10-ehci - - allwinner,sun50i-a64-ehci - - allwinner,sun50i-h6-ehci -+ - allwinner,sun50i-h616-ehci - - allwinner,sun5i-a13-ehci - - allwinner,sun6i-a31-ehci - - allwinner,sun7i-a20-ehci ---- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml -+++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml -@@ -20,6 +20,7 @@ properties: - - allwinner,sun4i-a10-ohci - - allwinner,sun50i-a64-ohci - - allwinner,sun50i-h6-ohci -+ - allwinner,sun50i-h616-ohci - - allwinner,sun5i-a13-ohci - - allwinner,sun6i-a31-ohci - - allwinner,sun7i-a20-ohci diff --git a/target/linux/sunxi/patches-6.6/002-v6.2-dt-bindings-phy-Add-special-clock-for-Allwinner-H616-PHY.patch b/target/linux/sunxi/patches-6.6/002-v6.2-dt-bindings-phy-Add-special-clock-for-Allwinner-H616-PHY.patch deleted file mode 100644 index 5739172ceb..0000000000 --- a/target/linux/sunxi/patches-6.6/002-v6.2-dt-bindings-phy-Add-special-clock-for-Allwinner-H616-PHY.patch +++ /dev/null @@ -1,79 +0,0 @@ -From 6964affe65066651eca21e97247d3b7cac5153dc Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Mon, 31 Oct 2022 11:13:53 +0000 -Subject: [PATCH] dt-bindings: phy: Add special clock for Allwinner H616 PHY - -The USB PHY IP in the Allwinner H616 SoC requires a quirk that involves -some resources from port 2's PHY and HCI IP. In particular the PMU clock -for port 2 must be surely ungated before accessing the REG_HCI_PHY_CTL -register of port 2. To allow each USB port to be controlled -independently of port 2, we need a handle to that particular PMU clock -in the *PHY* node, as the HCI and PHY part might be handled by separate -drivers. - -Add that clock to the requirements of the H616 PHY binding, so that a -PHY driver can apply the quirk in isolation, without requiring help from -port 2's HCI driver. - -Signed-off-by: Andre Przywara -Reviewed-by: Rob Herring -Link: https://lore.kernel.org/r/20221031111358.3387297-3-andre.przywara@arm.com -Signed-off-by: Vinod Koul ---- - .../phy/allwinner,sun8i-h3-usb-phy.yaml | 26 +++++++++++++++++++ - 1 file changed, 26 insertions(+) - ---- a/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml -+++ b/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml -@@ -36,18 +36,22 @@ properties: - - const: pmu3 - - clocks: -+ minItems: 4 - items: - - description: USB OTG PHY bus clock - - description: USB Host 0 PHY bus clock - - description: USB Host 1 PHY bus clock - - description: USB Host 2 PHY bus clock -+ - description: PMU clock for host port 2 - - clock-names: -+ minItems: 4 - items: - - const: usb0_phy - - const: usb1_phy - - const: usb2_phy - - const: usb3_phy -+ - const: pmu2_clk - - resets: - items: -@@ -96,6 +100,28 @@ required: - - resets - - reset-names - -+allOf: -+ - if: -+ properties: -+ compatible: -+ contains: -+ enum: -+ - allwinner,sun50i-h616-usb-phy -+ then: -+ properties: -+ clocks: -+ minItems: 5 -+ -+ clock-names: -+ minItems: 5 -+ else: -+ properties: -+ clocks: -+ maxItems: 4 -+ -+ clock-names: -+ maxItems: 4 -+ - additionalProperties: false - - examples: diff --git a/target/linux/sunxi/patches-6.6/003-v6.2-arm64-dts-allwinner-h616-Add-USB-nodes.patch b/target/linux/sunxi/patches-6.6/003-v6.2-arm64-dts-allwinner-h616-Add-USB-nodes.patch deleted file mode 100644 index 6dc1cf2f36..0000000000 --- a/target/linux/sunxi/patches-6.6/003-v6.2-arm64-dts-allwinner-h616-Add-USB-nodes.patch +++ /dev/null @@ -1,188 +0,0 @@ -From f40cf244c3feb4e1a442f8029b691add2c65b3ab Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Mon, 31 Oct 2022 11:13:56 +0000 -Subject: [PATCH] arm64: dts: allwinner: h616: Add USB nodes - -Add the nodes for the MUSB and the four USB host controllers to the SoC -.dtsi, along with the PHY node needed to bind all of them together. - -EHCI/OHCI and MUSB are compatible to previous SoCs, but the PHY requires -some quirks (handled in the driver). - -Signed-off-by: Andre Przywara -Reviewed-by: Jernej Skrabec -Link: https://lore.kernel.org/r/20221031111358.3387297-6-andre.przywara@arm.com -Signed-off-by: Jernej Skrabec ---- - .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 160 ++++++++++++++++++ - 1 file changed, 160 insertions(+) - ---- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi -@@ -504,6 +504,166 @@ - }; - }; - -+ usbotg: usb@5100000 { -+ compatible = "allwinner,sun50i-h616-musb", -+ "allwinner,sun8i-h3-musb"; -+ reg = <0x05100000 0x0400>; -+ clocks = <&ccu CLK_BUS_OTG>; -+ resets = <&ccu RST_BUS_OTG>; -+ interrupts = ; -+ interrupt-names = "mc"; -+ phys = <&usbphy 0>; -+ phy-names = "usb"; -+ extcon = <&usbphy 0>; -+ status = "disabled"; -+ }; -+ -+ usbphy: phy@5100400 { -+ compatible = "allwinner,sun50i-h616-usb-phy"; -+ reg = <0x05100400 0x24>, -+ <0x05101800 0x14>, -+ <0x05200800 0x14>, -+ <0x05310800 0x14>, -+ <0x05311800 0x14>; -+ reg-names = "phy_ctrl", -+ "pmu0", -+ "pmu1", -+ "pmu2", -+ "pmu3"; -+ clocks = <&ccu CLK_USB_PHY0>, -+ <&ccu CLK_USB_PHY1>, -+ <&ccu CLK_USB_PHY2>, -+ <&ccu CLK_USB_PHY3>, -+ <&ccu CLK_BUS_EHCI2>; -+ clock-names = "usb0_phy", -+ "usb1_phy", -+ "usb2_phy", -+ "usb3_phy", -+ "pmu2_clk"; -+ resets = <&ccu RST_USB_PHY0>, -+ <&ccu RST_USB_PHY1>, -+ <&ccu RST_USB_PHY2>, -+ <&ccu RST_USB_PHY3>; -+ reset-names = "usb0_reset", -+ "usb1_reset", -+ "usb2_reset", -+ "usb3_reset"; -+ status = "disabled"; -+ #phy-cells = <1>; -+ }; -+ -+ ehci0: usb@5101000 { -+ compatible = "allwinner,sun50i-h616-ehci", -+ "generic-ehci"; -+ reg = <0x05101000 0x100>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_OHCI0>, -+ <&ccu CLK_BUS_EHCI0>, -+ <&ccu CLK_USB_OHCI0>; -+ resets = <&ccu RST_BUS_OHCI0>, -+ <&ccu RST_BUS_EHCI0>; -+ phys = <&usbphy 0>; -+ phy-names = "usb"; -+ status = "disabled"; -+ }; -+ -+ ohci0: usb@5101400 { -+ compatible = "allwinner,sun50i-h616-ohci", -+ "generic-ohci"; -+ reg = <0x05101400 0x100>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_OHCI0>, -+ <&ccu CLK_USB_OHCI0>; -+ resets = <&ccu RST_BUS_OHCI0>; -+ phys = <&usbphy 0>; -+ phy-names = "usb"; -+ status = "disabled"; -+ }; -+ -+ ehci1: usb@5200000 { -+ compatible = "allwinner,sun50i-h616-ehci", -+ "generic-ehci"; -+ reg = <0x05200000 0x100>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_OHCI1>, -+ <&ccu CLK_BUS_EHCI1>, -+ <&ccu CLK_USB_OHCI1>; -+ resets = <&ccu RST_BUS_OHCI1>, -+ <&ccu RST_BUS_EHCI1>; -+ phys = <&usbphy 1>; -+ phy-names = "usb"; -+ status = "disabled"; -+ }; -+ -+ ohci1: usb@5200400 { -+ compatible = "allwinner,sun50i-h616-ohci", -+ "generic-ohci"; -+ reg = <0x05200400 0x100>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_OHCI1>, -+ <&ccu CLK_USB_OHCI1>; -+ resets = <&ccu RST_BUS_OHCI1>; -+ phys = <&usbphy 1>; -+ phy-names = "usb"; -+ status = "disabled"; -+ }; -+ -+ ehci2: usb@5310000 { -+ compatible = "allwinner,sun50i-h616-ehci", -+ "generic-ehci"; -+ reg = <0x05310000 0x100>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_OHCI2>, -+ <&ccu CLK_BUS_EHCI2>, -+ <&ccu CLK_USB_OHCI2>; -+ resets = <&ccu RST_BUS_OHCI2>, -+ <&ccu RST_BUS_EHCI2>; -+ phys = <&usbphy 2>; -+ phy-names = "usb"; -+ status = "disabled"; -+ }; -+ -+ ohci2: usb@5310400 { -+ compatible = "allwinner,sun50i-h616-ohci", -+ "generic-ohci"; -+ reg = <0x05310400 0x100>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_OHCI2>, -+ <&ccu CLK_USB_OHCI2>; -+ resets = <&ccu RST_BUS_OHCI2>; -+ phys = <&usbphy 2>; -+ phy-names = "usb"; -+ status = "disabled"; -+ }; -+ -+ ehci3: usb@5311000 { -+ compatible = "allwinner,sun50i-h616-ehci", -+ "generic-ehci"; -+ reg = <0x05311000 0x100>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_OHCI3>, -+ <&ccu CLK_BUS_EHCI3>, -+ <&ccu CLK_USB_OHCI3>; -+ resets = <&ccu RST_BUS_OHCI3>, -+ <&ccu RST_BUS_EHCI3>; -+ phys = <&usbphy 3>; -+ phy-names = "usb"; -+ status = "disabled"; -+ }; -+ -+ ohci3: usb@5311400 { -+ compatible = "allwinner,sun50i-h616-ohci", -+ "generic-ohci"; -+ reg = <0x05311400 0x100>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_OHCI3>, -+ <&ccu CLK_USB_OHCI3>; -+ resets = <&ccu RST_BUS_OHCI3>; -+ phys = <&usbphy 3>; -+ phy-names = "usb"; -+ status = "disabled"; -+ }; -+ - rtc: rtc@7000000 { - compatible = "allwinner,sun50i-h616-rtc"; - reg = <0x07000000 0x400>; diff --git a/target/linux/sunxi/patches-6.6/004-v6.2-arm64-dts-allwinner-h616-OrangePi-Zero-2-Add-USB-nodes.patch b/target/linux/sunxi/patches-6.6/004-v6.2-arm64-dts-allwinner-h616-OrangePi-Zero-2-Add-USB-nodes.patch deleted file mode 100644 index a544e482f3..0000000000 --- a/target/linux/sunxi/patches-6.6/004-v6.2-arm64-dts-allwinner-h616-OrangePi-Zero-2-Add-USB-nodes.patch +++ /dev/null @@ -1,81 +0,0 @@ -From db5f028309ede13767e2ba356c1975ac37a4fd6c Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Mon, 31 Oct 2022 11:13:57 +0000 -Subject: [PATCH] arm64: dts: allwinner: h616: OrangePi Zero 2: Add USB nodes - -The OrangePi Zero 2 has one USB-A host port, VBUS is provided by -a GPIO controlled regulator. -The USB-C port is meant to power the board, but is also connected to -the USB 0 port, which we configure as an MUSB peripheral. - -Signed-off-by: Andre Przywara -Reviewed-by: Jernej Skrabec -Link: https://lore.kernel.org/r/20221031111358.3387297-7-andre.przywara@arm.com -Signed-off-by: Jernej Skrabec ---- - .../allwinner/sun50i-h616-orangepi-zero2.dts | 41 +++++++++++++++++++ - 1 file changed, 41 insertions(+) - ---- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts -@@ -49,8 +49,24 @@ - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; -+ -+ reg_usb1_vbus: regulator-usb1-vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb1-vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <®_vcc5v>; -+ enable-active-high; -+ gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */ -+ }; -+}; -+ -+&ehci1 { -+ status = "okay"; - }; - -+/* USB 2 & 3 are on headers only. */ -+ - &emac0 { - pinctrl-names = "default"; - pinctrl-0 = <&ext_rgmii_pins>; -@@ -76,6 +92,10 @@ - status = "okay"; - }; - -+&ohci1 { -+ status = "okay"; -+}; -+ - &r_rsb { - status = "okay"; - -@@ -211,3 +231,24 @@ - pinctrl-0 = <&uart0_ph_pins>; - status = "okay"; - }; -+ -+&usbotg { -+ /* -+ * PHY0 pins are connected to a USB-C socket, but a role switch -+ * is not implemented: both CC pins are pulled to GND. -+ * The VBUS pins power the device, so a fixed peripheral mode -+ * is the best choice. -+ * The board can be powered via GPIOs, in this case port0 *can* -+ * act as a host (with a cable/adapter ignoring CC), as VBUS is -+ * then provided by the GPIOs. Any user of this setup would -+ * need to adjust the DT accordingly: dr_mode set to "host", -+ * enabling OHCI0 and EHCI0. -+ */ -+ dr_mode = "peripheral"; -+ status = "okay"; -+}; -+ -+&usbphy { -+ usb1_vbus-supply = <®_usb1_vbus>; -+ status = "okay"; -+}; diff --git a/target/linux/sunxi/patches-6.6/005-v6.6-arm64-dts-allwinner-h616-Split-Orange-Pi-Zero-2-DT.patch b/target/linux/sunxi/patches-6.6/005-v6.6-arm64-dts-allwinner-h616-Split-Orange-Pi-Zero-2-DT.patch deleted file mode 100644 index 0747e6a8e0..0000000000 --- a/target/linux/sunxi/patches-6.6/005-v6.6-arm64-dts-allwinner-h616-Split-Orange-Pi-Zero-2-DT.patch +++ /dev/null @@ -1,305 +0,0 @@ -From 322bf103204b8f786547acbeed85569254e7088f Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Fri, 4 Aug 2023 18:08:54 +0100 -Subject: [PATCH] arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DT - -The Orange Pi Zero 2 got a successor (Zero 3), which shares quite some -DT nodes with the Zero 2, but comes with a different PMIC. - -Move the common parts (except the PMIC) into a new shared file, and -include that from the existing board .dts file. - -No functional change, the generated DTB is the same, except for some -phandle numbering differences. - -Signed-off-by: Andre Przywara -Acked-by: Jernej Skrabec -Link: https://lore.kernel.org/r/20230804170856.1237202-2-andre.przywara@arm.com -Signed-off-by: Jernej Skrabec ---- - .../allwinner/sun50i-h616-orangepi-zero.dtsi | 134 ++++++++++++++++++ - .../allwinner/sun50i-h616-orangepi-zero2.dts | 119 +--------------- - 2 files changed, 135 insertions(+), 118 deletions(-) - create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi - ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi -@@ -0,0 +1,134 @@ -+// SPDX-License-Identifier: (GPL-2.0+ or MIT) -+/* -+ * Copyright (C) 2020 Arm Ltd. -+ * -+ * DT nodes common between Orange Pi Zero 2 and Orange Pi Zero 3. -+ * Excludes PMIC nodes and properties, since they are different between the two. -+ */ -+ -+#include "sun50i-h616.dtsi" -+ -+#include -+#include -+#include -+ -+/ { -+ aliases { -+ ethernet0 = &emac0; -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led-0 { -+ function = LED_FUNCTION_POWER; -+ color = ; -+ gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ -+ default-state = "on"; -+ }; -+ -+ led-1 { -+ function = LED_FUNCTION_STATUS; -+ color = ; -+ gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */ -+ }; -+ }; -+ -+ reg_vcc5v: vcc5v { -+ /* board wide 5V supply directly from the USB-C socket */ -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc-5v"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ reg_usb1_vbus: regulator-usb1-vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb1-vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <®_vcc5v>; -+ enable-active-high; -+ gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */ -+ }; -+}; -+ -+&ehci1 { -+ status = "okay"; -+}; -+ -+/* USB 2 & 3 are on headers only. */ -+ -+&emac0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&ext_rgmii_pins>; -+ phy-mode = "rgmii"; -+ phy-handle = <&ext_rgmii_phy>; -+ allwinner,rx-delay-ps = <3100>; -+ allwinner,tx-delay-ps = <700>; -+ status = "okay"; -+}; -+ -+&mdio0 { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; -+}; -+ -+&mmc0 { -+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&ohci1 { -+ status = "okay"; -+}; -+ -+&spi0 { -+ status = "okay"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; -+ -+ flash@0 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <40000000>; -+ }; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_ph_pins>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ /* -+ * PHY0 pins are connected to a USB-C socket, but a role switch -+ * is not implemented: both CC pins are pulled to GND. -+ * The VBUS pins power the device, so a fixed peripheral mode -+ * is the best choice. -+ * The board can be powered via GPIOs, in this case port0 *can* -+ * act as a host (with a cable/adapter ignoring CC), as VBUS is -+ * then provided by the GPIOs. Any user of this setup would -+ * need to adjust the DT accordingly: dr_mode set to "host", -+ * enabling OHCI0 and EHCI0. -+ */ -+ dr_mode = "peripheral"; -+ status = "okay"; -+}; -+ -+&usbphy { -+ usb1_vbus-supply = <®_usb1_vbus>; -+ status = "okay"; -+}; ---- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts -@@ -5,95 +5,19 @@ - - /dts-v1/; - --#include "sun50i-h616.dtsi" -- --#include --#include --#include -+#include "sun50i-h616-orangepi-zero.dtsi" - - / { - model = "OrangePi Zero2"; - compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616"; -- -- aliases { -- ethernet0 = &emac0; -- serial0 = &uart0; -- }; -- -- chosen { -- stdout-path = "serial0:115200n8"; -- }; -- -- leds { -- compatible = "gpio-leds"; -- -- led-0 { -- function = LED_FUNCTION_POWER; -- color = ; -- gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ -- default-state = "on"; -- }; -- -- led-1 { -- function = LED_FUNCTION_STATUS; -- color = ; -- gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */ -- }; -- }; -- -- reg_vcc5v: vcc5v { -- /* board wide 5V supply directly from the USB-C socket */ -- compatible = "regulator-fixed"; -- regulator-name = "vcc-5v"; -- regulator-min-microvolt = <5000000>; -- regulator-max-microvolt = <5000000>; -- regulator-always-on; -- }; -- -- reg_usb1_vbus: regulator-usb1-vbus { -- compatible = "regulator-fixed"; -- regulator-name = "usb1-vbus"; -- regulator-min-microvolt = <5000000>; -- regulator-max-microvolt = <5000000>; -- vin-supply = <®_vcc5v>; -- enable-active-high; -- gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */ -- }; --}; -- --&ehci1 { -- status = "okay"; - }; - --/* USB 2 & 3 are on headers only. */ -- - &emac0 { -- pinctrl-names = "default"; -- pinctrl-0 = <&ext_rgmii_pins>; -- phy-mode = "rgmii"; -- phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_dcdce>; -- allwinner,rx-delay-ps = <3100>; -- allwinner,tx-delay-ps = <700>; -- status = "okay"; --}; -- --&mdio0 { -- ext_rgmii_phy: ethernet-phy@1 { -- compatible = "ethernet-phy-ieee802.3-c22"; -- reg = <1>; -- }; - }; - - &mmc0 { - vmmc-supply = <®_dcdce>; -- cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ -- bus-width = <4>; -- status = "okay"; --}; -- --&ohci1 { -- status = "okay"; - }; - - &r_rsb { -@@ -211,44 +135,3 @@ - vcc-ph-supply = <®_aldo1>; - vcc-pi-supply = <®_aldo1>; - }; -- --&spi0 { -- status = "okay"; -- pinctrl-names = "default"; -- pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; -- -- flash@0 { -- #address-cells = <1>; -- #size-cells = <1>; -- compatible = "jedec,spi-nor"; -- reg = <0>; -- spi-max-frequency = <40000000>; -- }; --}; -- --&uart0 { -- pinctrl-names = "default"; -- pinctrl-0 = <&uart0_ph_pins>; -- status = "okay"; --}; -- --&usbotg { -- /* -- * PHY0 pins are connected to a USB-C socket, but a role switch -- * is not implemented: both CC pins are pulled to GND. -- * The VBUS pins power the device, so a fixed peripheral mode -- * is the best choice. -- * The board can be powered via GPIOs, in this case port0 *can* -- * act as a host (with a cable/adapter ignoring CC), as VBUS is -- * then provided by the GPIOs. Any user of this setup would -- * need to adjust the DT accordingly: dr_mode set to "host", -- * enabling OHCI0 and EHCI0. -- */ -- dr_mode = "peripheral"; -- status = "okay"; --}; -- --&usbphy { -- usb1_vbus-supply = <®_usb1_vbus>; -- status = "okay"; --}; diff --git a/target/linux/sunxi/patches-6.6/006-v6.6-arm64-dts-allwinner-h616-Add-OrangePi-Zero-3-board.patch b/target/linux/sunxi/patches-6.6/006-v6.6-arm64-dts-allwinner-h616-Add-OrangePi-Zero-3-board.patch deleted file mode 100644 index 4081a82d52..0000000000 --- a/target/linux/sunxi/patches-6.6/006-v6.6-arm64-dts-allwinner-h616-Add-OrangePi-Zero-3-board.patch +++ /dev/null @@ -1,140 +0,0 @@ -From f1b3ddb3ecc2eec1f912383e01156c226daacfab Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Fri, 4 Aug 2023 18:08:56 +0100 -Subject: [PATCH] arm64: dts: allwinner: h616: Add OrangePi Zero 3 board - support - -The OrangePi Zero 3 is a development board based on the Allwinner H618 SoC, -which seems to be just an H616 with more L2 cache. The board itself is a -slightly updated version of the Orange Pi Zero 2. It features: -- Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU -- 1/1.5/2/4 GiB LPDDR4 DRAM SKUs (only up to 1GB on the Zero2) -- AXP313a PMIC (more capable AXP305 on the Zero2) -- Raspberry-Pi-1 compatible GPIO header -- extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports -- 1 USB 2.0 host port -- 1 USB 2.0 type C port (power supply + OTG) -- MicroSD slot -- on-board 16MiB bootable SPI NOR flash (only 2MB on the Zero2) -- 1Gbps Ethernet port (via Motorcomm YT8531 PHY) (RTL8211 on the Zero2) -- micro-HDMI port -- (yet) unsupported Allwinner WiFi/BT chip - -Add the devicetree file describing the currently supported features, -namely LEDs, SD card, PMIC, SPI flash, USB. Ethernet seems unstable at -the moment, though the basic functionality works. - -Signed-off-by: Andre Przywara -Reviewed-by: Jernej Skrabec -Link: https://lore.kernel.org/r/20230804170856.1237202-4-andre.przywara@arm.com -Signed-off-by: Jernej Skrabec ---- - arch/arm64/boot/dts/allwinner/Makefile | 1 + - .../allwinner/sun50i-h618-orangepi-zero3.dts | 94 +++++++++++++++++++ - 2 files changed, 95 insertions(+) - create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts - ---- a/arch/arm64/boot/dts/allwinner/Makefile -+++ b/arch/arm64/boot/dts/allwinner/Makefile -@@ -40,3 +40,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-ta - dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb - dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb - dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb -+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts -@@ -0,0 +1,94 @@ -+// SPDX-License-Identifier: (GPL-2.0+ or MIT) -+/* -+ * Copyright (C) 2023 Arm Ltd. -+ */ -+ -+/dts-v1/; -+ -+#include "sun50i-h616-orangepi-zero.dtsi" -+ -+/ { -+ model = "OrangePi Zero3"; -+ compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618"; -+}; -+ -+&emac0 { -+ phy-supply = <®_dldo1>; -+}; -+ -+&ext_rgmii_phy { -+ motorcomm,clk-out-frequency-hz = <125000000>; -+}; -+ -+&mmc0 { -+ /* -+ * The schematic shows the card detect pin wired up to PF6, via an -+ * inverter, but it just doesn't work. -+ */ -+ broken-cd; -+ vmmc-supply = <®_dldo1>; -+}; -+ -+&r_i2c { -+ status = "okay"; -+ -+ axp313: pmic@36 { -+ compatible = "x-powers,axp313a"; -+ reg = <0x36>; -+ #interrupt-cells = <1>; -+ interrupt-controller; -+ interrupt-parent = <&pio>; -+ interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>; /* PC9 */ -+ -+ vin1-supply = <®_vcc5v>; -+ vin2-supply = <®_vcc5v>; -+ vin3-supply = <®_vcc5v>; -+ -+ regulators { -+ /* Supplies VCC-PLL, so needs to be always on. */ -+ reg_aldo1: aldo1 { -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc1v8"; -+ }; -+ -+ /* Supplies VCC-IO, so needs to be always on. */ -+ reg_dldo1: dldo1 { -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc3v3"; -+ }; -+ -+ reg_dcdc1: dcdc1 { -+ regulator-always-on; -+ regulator-min-microvolt = <810000>; -+ regulator-max-microvolt = <990000>; -+ regulator-name = "vdd-gpu-sys"; -+ }; -+ -+ reg_dcdc2: dcdc2 { -+ regulator-always-on; -+ regulator-min-microvolt = <810000>; -+ regulator-max-microvolt = <1100000>; -+ regulator-name = "vdd-cpu"; -+ }; -+ -+ reg_dcdc3: dcdc3 { -+ regulator-always-on; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; -+ regulator-name = "vdd-dram"; -+ }; -+ }; -+ }; -+}; -+ -+&pio { -+ vcc-pc-supply = <®_dldo1>; -+ vcc-pf-supply = <®_dldo1>; -+ vcc-pg-supply = <®_aldo1>; -+ vcc-ph-supply = <®_dldo1>; -+ vcc-pi-supply = <®_dldo1>; -+}; diff --git a/target/linux/sunxi/patches-6.6/007-v6.7-arm64-dts-allwinner-h616-update-emac-for-Orange-Pi.patch b/target/linux/sunxi/patches-6.6/007-v6.7-arm64-dts-allwinner-h616-update-emac-for-Orange-Pi.patch deleted file mode 100644 index a492eed551..0000000000 --- a/target/linux/sunxi/patches-6.6/007-v6.7-arm64-dts-allwinner-h616-update-emac-for-Orange-Pi.patch +++ /dev/null @@ -1,57 +0,0 @@ -From b9622937d95809ef89904583191571a9fa326402 Mon Sep 17 00:00:00 2001 -From: Chukun Pan -Date: Sun, 29 Oct 2023 15:40:09 +0800 -Subject: [PATCH] arm64: dts: allwinner: h616: update emac for Orange Pi Zero 3 - -The current emac setting is not suitable for Orange Pi Zero 3, -move it back to Orange Pi Zero 2 DT. Also update phy mode and -delay values for emac on Orange Pi Zero 3. -With these changes, Ethernet now looks stable. - -Fixes: 322bf103204b ("arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DT") -Signed-off-by: Chukun Pan -Reviewed-by: Jernej Skrabec -Link: https://lore.kernel.org/r/20231029074009.7820-2-amadeus@jmu.edu.cn -Signed-off-by: Jernej Skrabec ---- - arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi | 3 --- - arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 3 +++ - arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts | 2 ++ - 3 files changed, 5 insertions(+), 3 deletions(-) - ---- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi -@@ -68,10 +68,7 @@ - &emac0 { - pinctrl-names = "default"; - pinctrl-0 = <&ext_rgmii_pins>; -- phy-mode = "rgmii"; - phy-handle = <&ext_rgmii_phy>; -- allwinner,rx-delay-ps = <3100>; -- allwinner,tx-delay-ps = <700>; - status = "okay"; - }; - ---- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts -@@ -13,6 +13,9 @@ - }; - - &emac0 { -+ allwinner,rx-delay-ps = <3100>; -+ allwinner,tx-delay-ps = <700>; -+ phy-mode = "rgmii"; - phy-supply = <®_dcdce>; - }; - ---- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts -@@ -13,6 +13,8 @@ - }; - - &emac0 { -+ allwinner,tx-delay-ps = <700>; -+ phy-mode = "rgmii-rxid"; - phy-supply = <®_dldo1>; - }; - -- cgit v1.2.3