// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>

/ {
	model = "EdgeCore OAP-100";
	compatible = "edgecore,oap100";

	aliases {
		led-boot = &led_system;
		led-failsafe = &led_system;
		led-running = &led_system;
		led-upgrade = &led_system;
	};

	chosen {
		bootargs-append = " root=/dev/ubiblock0_1";
	};

	soc {
		mdio@90000 {
			status = "okay";
			pinctrl-0 = <&mdio_pins>;
			pinctrl-names = "default";
		};

		tcsr@1949000 {
			compatible = "qcom,tcsr";
			reg = <0x1949000 0x100>;
			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
		};

		ess_tcsr@1953000 {
			compatible = "qcom,tcsr";
			reg = <0x1953000 0x1000>;
			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
		};

		tcsr@1957000 {
			compatible = "qcom,tcsr";
			reg = <0x1957000 0x100>;
			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
		};

		tcsr@194b000 {
			/* select hostmode */
			compatible = "qcom,tcsr";
			reg = <0x194b000 0x100>;
			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
			status = "okay";
		};

		usb2@60f8800 {
			status = "okay";

			dwc3@6000000 {
				#address-cells = <1>;
				#size-cells = <0>;

				usb2_port1: port@1 {
					reg = <1>;
					#trigger-source-cells = <0>;
				};
			};
		};

		usb3@8af8800 {
			status = "okay";

			dwc3@8a00000 {
				#address-cells = <1>;
				#size-cells = <0>;

				usb3_port1: port@1 {
					reg = <1>;
					#trigger-source-cells = <0>;
				};

				usb3_port2: port@2 {
					reg = <2>;
					#trigger-source-cells = <0>;
				};
			};
		};

		crypto@8e3a000 {
			status = "okay";
		};

		watchdog@b017000 {
			status = "okay";
		};
	};

	key {
		compatible = "gpio-keys";

		button@1 {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
			linux,input-type = <1>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_system: led_system {
			label = "green:system";
			gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
		};

		led_2g {
			label = "blue:wlan2g";
			gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;
		};

		led_5g {
			label = "blue:wlan5g";
			gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
		};
	};

	gpio_export {
		compatible = "gpio-export";
		#size-cells = <0>;

		usb {
			gpio-export,name = "usb-power";
			gpio-export,output = <1>;
			gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>;
		};

		poe {
			gpio-export,name = "poe-power";
			gpio-export,output = <0>;
			gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
		};
	};
};

&tlmm {
	serial_0_pins: serial_pinmux {
		mux {
			pins = "gpio16", "gpio17";
			function = "blsp_uart0";
			bias-disable;
		};
	};

	spi_0_pins: spi_0_pinmux {
		pinmux {
			function = "blsp_spi0";
			pins = "gpio13", "gpio14", "gpio15";
			drive-strength = <12>;
			bias-disable;
		};

		pinmux_cs {
			function = "gpio";
			pins = "gpio12";
			drive-strength = <2>;
			bias-disable;
			output-high;
		};
	};

	nand_pins: nand_pins {
		pullups {
			pins = "gpio53", "gpio58", "gpio59";
			function = "qpic";
			bias-pull-up;
		};

		pulldowns {
			pins = "gpio54", "gpio55", "gpio56",
				"gpio57", "gpio60", "gpio61",
				"gpio62", "gpio63", "gpio64",
				"gpio65", "gpio66", "gpio67",
				"gpio68", "gpio69";
			function = "qpic";
			bias-pull-down;
		};
	};

	mdio_pins: mdio_pinmux {
		mux_1 {
			pins = "gpio6";
			function = "mdio";
			bias-pull-up;
		};
		mux_2 {
			pins = "gpio7";
			function = "mdc";
			bias-pull-up;
		};
	};
};

&cryptobam {
	status = "okay";
};

&blsp1_spi1 {
	pinctrl-0 = <&spi_0_pins>;
	pinctrl-names = "default";
	status = "okay";
	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;

	flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		reg = <0>;
		linux,modalias = "m25p80", "gd25q256";
		spi-max-frequency = <24000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition0@0 {
				label = "0:SBL1";
				reg = <0x00000000 0x00040000>;
				read-only;
			};
			partition1@40000 {
				label = "0:MIBIB";
				reg = <0x00040000 0x00020000>;
				read-only;
			};
			partition2@60000 {
				label = "0:QSEE";
				reg = <0x00060000 0x00060000>;
				read-only;
			};
			partition3@c0000 {
				label = "0:CDT";
				reg = <0x000c0000 0x00010000>;
				read-only;
			};
			partition4@d0000 {
				label = "0:DDRPARAMS";
				reg = <0x000d0000 0x00010000>;
				read-only;
			};
			partition5@e0000 {
				label = "0:APPSBLENV";
				reg = <0x000e0000 0x00010000>;
				read-only;
			};
			partition6@f0000 {
				label = "0:APPSBL";
				reg = <0x000f0000 0x00080000>;
				read-only;
			};
			partition7@170000 {
				label = "0:ART";
				reg = <0x00170000 0x00010000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					precal_art_1000: precal@1000 {
						reg = <0x1000 0x2f20>;
					};

					precal_art_5000: precal@5000 {
						reg = <0x5000 0x2f20>;
					};
				};
			};
		};
	};
};

&nand {
	pinctrl-0 = <&nand_pins>;
	pinctrl-names = "default";
	status = "okay";

	nand@0 {
		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "rootfs";
				reg = <0x00000000 0x4000000>;
			};
		};
	};
};

&blsp_dma {
	status = "okay";
};

&blsp1_uart1 {
	pinctrl-0 = <&serial_0_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&qpic_bam {
	status = "okay";
};

&wifi0 {
	status = "okay";
	nvmem-cell-names = "pre-calibration";
	nvmem-cells = <&precal_art_1000>;
	qcom,ath10k-calibration-variant = "Edgecore OAP100";
};

&wifi1 {
	status = "okay";
	nvmem-cell-names = "pre-calibration";
	nvmem-cells = <&precal_art_5000>;
	qcom,ath10k-calibration-variant = "Edgecore OAP100";
};

&usb3_ss_phy {
	status = "okay";
};

&usb3_hs_phy {
	status = "okay";
};

&usb2_hs_phy {
	status = "okay";
};