// SPDX-License-Identifier: MIT, GPL-2.0 or later
/* Copyright (c) 2023, Ruslan Isaev <legale.legale@gmail.com> */

/dts-v1/;

#include "ipq8074.dtsi"
#include "ipq8074-hk-cpu.dtsi"
#include "ipq8074-ess.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	model = "Yuncore AX880";
	compatible = "yuncore,ax880", "qcom,ipq8074", "qcom,ipq8074-hk09";

	aliases {
		serial0 = &blsp1_uart5;
		serial1 = &blsp1_uart3;
		led-boot = &led_system;
		led-failsafe = &led_system;
		led-running = &led_system;
		led-upgrade = &led_system;
		/* Aliases as required by u-boot to patch MAC addresses */
		ethernet0 = &dp5_syn;
		ethernet1 = &dp6_syn;
		label-mac-device = &dp5_syn;
	};

	chosen {
		stdout-path = "serial0:115200n8";
		bootargs-append = " root=/dev/ubiblock0_1";
	};

	keys {
		compatible = "gpio-keys";
		pinctrl-0 = <&button_pins>;
		pinctrl-names = "default";

		reset {
			label = "reset";
			gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_system: system {
			label = "system";
			color = "red";
			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
		};

		wlan2g {
			label = "wlan2g";
			color = "green";
			linux,default-trigger = "phy0tpt";
			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
		};

		wlan5g {
			label = "wlan5g";
			color = "blue";
			linux,default-trigger = "phy1tpt";
			gpios = <&tlmm 9 GPIO_ACTIVE_HIGH>;
		};
	};
};

&tlmm {
	mdio_pins: mdio-pins {
		mdc {
			pins = "gpio68";
			function = "mdc";
			drive-strength = <8>;
			bias-pull-up;
		};

		mdio {
			pins = "gpio69";
			function = "mdio";
			drive-strength = <8>;
			bias-pull-up;
		};
	};

	button_pins: button_pins {
		reset_button {
			pins = "gpio57";
			function = "gpio";
			drive-strength = <8>;
			bias-pull-up;
		};
	};
};

&blsp1_spi1 {
	status = "okay";

	flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0>;
		compatible = "jedec,spi-nor";
		spi-max-frequency = <50000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "0:sbl1";
				reg = <0x0 0x50000>;
				read-only;
			};

			partition@50000 {
				label = "0:mibib";
				reg = <0x50000 0x10000>;
				read-only;
			};

			partition@60000 {
				label = "0:bootconfig";
				reg = <0x60000 0x20000>;
				read-only;
			};

			partition@80000 {
				label = "0:bootconfig1";
				reg = <0x80000 0x20000>;
				read-only;
			};

			partition@a0000 {
				label = "0:qsee_1";
				reg = <0xa0000 0x180000>;
				read-only;
			};

			partition@220000 {
				label = "0:qsee";
				reg = <0x220000 0x180000>;
				read-only;
			};

			partition@3a0000 {
				label = "0:devcfg";
				reg = <0x3a0000 0x10000>;
				read-only;
			};

			partition@3b0000 {
				label = "0:devcfg_1";
				reg = <0x3b0000 0x10000>;
				read-only;
			};

			partition@3c0000 {
				label = "0:apdp";
				reg = <0x3c0000 0x10000>;
				read-only;
			};

			partition@3d0000 {
				label = "0:apdp_1";
				reg = <0x3d0000 0x10000>;
				read-only;
			};

			partition@3e0000 {
				label = "0:rpm_1";
				reg = <0x3e0000 0x40000>;
				read-only;
			};

			partition@420000 {
				label = "0:rpm";
				reg = <0x420000 0x40000>;
				read-only;
			};

			partition@460000 {
				label = "0:cdt_1";
				reg = <0x460000 0x10000>;
				read-only;
			};

			partition@470000 {
				label = "0:cdt";
				reg = <0x470000 0x10000>;
				read-only;
			};

			partition@480000 {
				label = "0:appsblenv";
				reg = <0x480000 0x10000>;
			};

			partition@490000 {
				label = "0:appsbl_1";
				reg = <0x490000 0xa0000>;
				read-only;
			};

			partition@550000 {
				label = "0:appsbl";
				reg = <0x530000 0xa0000>;
				read-only;
			};

			partition@610000 {
				label = "0:art";
				reg = <0x5d0000 0x40000>;
				read-only;
			};

			partition@650000 {
				label = "0:ethphyfw";
				reg = <0x610000 0x80000>;
				read-only;
			};

		};
	};
};

//serial interface
&blsp1_uart3 {
	status = "okay";
};

&blsp1_uart5 {
	status = "okay";
};

&crypto {
	status = "okay";
};

&cryptobam {
	status = "okay";
};

&prng {
	status = "okay";
};

&qpic_bam {
	status = "okay";
};

&qusb_phy_0 {
	status = "okay";
};

&ssphy_0 {
	status = "okay";
};

&usb_0 {
	status = "okay";
};

&qpic_nand {
	status = "okay";

	nand@0 {
		reg = <0>;
		nand-ecc-strength = <4>;
		nand-ecc-step-size = <512>;
		nand-bus-width = <8>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "rootfs_1";
				reg = <0x0000000 0x3400000>;
			};

			partition@3400000 {
				label = "0:wififw";
				reg = <0x3400000 0x800000>;
				read-only;
			};

			rootfs: partition@3c00000 {
				label = "rootfs";
				reg = <0x3c00000 0x3400000>;
			};

			partition@7000000 {
				label = "0:wififw_1";
				reg = <0x7000000 0x800000>;
				read-only;
			};
		};
	};
};

&mdio {
	status = "okay";

	pinctrl-0 = <&mdio_pins>;
	pinctrl-names = "default";
   
	qca8081_24: ethernet-phy@24 {
		compatible = "ethernet-phy-id004d.d101";
		reg = <24>;
		reset-gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
	};

	qca8081_28: ethernet-phy@28 {
		compatible = "ethernet-phy-id004d.d101";
		reg = <28>;
		reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
	};
};

&switch {
	status = "okay";

	switch_lan_bmp = <ESS_PORT5>; /* lan port bitmap */
	switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */
	switch_mac_mode1 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance1*/
	switch_mac_mode2 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance2*/
	bm_tick_mode = <0>; /* bm tick mode */
	tm_tick_mode = <0>; /* tm tick mode */

	qcom,port_phyinfo {
		port@4 {
			port_id = <5>;
			phy_address = <24>;
			port_mac_sel = "QGMAC_PORT";
		};
		port@5 {
			port_id = <6>;
			phy_address = <28>;
			port_mac_sel = "QGMAC_PORT";
		};
	};
};

&edma {
	status = "okay";
};

&dp5_syn {
	status = "okay";
	phy-handle = <&qca8081_24>;
	label = "wan";
};

&dp6_syn {
	status = "okay";
	phy-handle = <&qca8081_28>;
	label = "lan";
};

&wifi {
	status = "okay";
	qcom,ath11k-calibration-variant = "Yuncore-AX880";
};