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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-10-01 13:50:30 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-11-12 03:35:02 +0100 |
| commit | 043d4e1be1f72647d8f7cfa8d99736d7ed351c3b (patch) | |
| tree | 5113c2caf01e8636e467442741126b13d8181171 /3rdparty/intel-microcode | |
| parent | 836db26b1cd5ebf712f0e847e6f3db87f1204fa2 (diff) | |
| download | coreboot-043d4e1be1f72647d8f7cfa8d99736d7ed351c3b.tar.gz coreboot-043d4e1be1f72647d8f7cfa8d99736d7ed351c3b.tar.bz2 coreboot-043d4e1be1f72647d8f7cfa8d99736d7ed351c3b.zip | |
Pass correct sleep type to mainboard sleep handler
The sleep type is 5 for S3 and 7 for S5.
Change-Id: I7ffdb3d27b6994ac4a12a343caf4d7abb82fe6ca
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1760
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to '3rdparty/intel-microcode')
0 files changed, 0 insertions, 0 deletions