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| author | Jerry Wang <jerryw@nvidia.com> | 2014-05-12 10:52:43 +0800 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2014-12-26 19:45:52 +0100 |
| commit | c7aa64bdff08399f43d58b615c0153a0001008c6 (patch) | |
| tree | c8e0708d87266ba5b14ab44f38978f16e0fbd6cc /3rdparty/stm | |
| parent | c85220654f03e1c0815627c36fb3928aef4e6850 (diff) | |
| download | coreboot-c7aa64bdff08399f43d58b615c0153a0001008c6.tar.gz coreboot-c7aa64bdff08399f43d58b615c0153a0001008c6.tar.bz2 coreboot-c7aa64bdff08399f43d58b615c0153a0001008c6.zip | |
blaze: change ramcode 0001/0010 to use 792MHz bct
This change updates the cfg file for Micron/Samsung 2GB,
792MHz DRAM based on the data generated by t124_emc_reg_tool.
BUG=none
BRANCH=blaze
TEST=emerged coreboot, booted successfully into kernel.
Original-Change-Id: I840cdd967c3b38479946a497a91da89bef5a98ad
Original-Signed-off-by: Jerry Wang <jerryw@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/199296
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
(cherry picked from commit cb70674c6551c8c36d2fd2d220e0f677ed2c6b24)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I11222bc1453a76cc27c2be169be5d3481ed7cfe7
Reviewed-on: http://review.coreboot.org/7902
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to '3rdparty/stm')
0 files changed, 0 insertions, 0 deletions