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authorZhuohao Lee <zhuohao@chromium.org>2022-01-20 21:30:12 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-02-25 20:45:49 +0000
commit09f3b6cf21d735b115d25bf081240979dccd0afc (patch)
tree5779523a9039598bcb4a6893d7b06bc09f1e72cf
parent9f091608b29526246cb02e79e8b4e8b286824509 (diff)
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mb, soc: change mainboard_memory_init_params prototype
The mainboard_memory_init_params takes the struct FSP_M_CONFIG as the input which make the board has no chance to modify data in the FSPM_UPD, for example, set FspmArchUpd.NvsBufferPtr = 0. After changing the FSP_M_CONFIG to FSPM_UPD, the board can modify the value based on its requirement. BUG=b:200243989 BRANCH=firmware-brya-14505.B TEST=build pass Change-Id: Id552b1f4662f5300f19a3fa2c1f43084ba846706 Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62293 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
-rw-r--r--src/mainboard/google/brya/romstage.c3
-rw-r--r--src/mainboard/intel/adlrvp/romstage_fsp_params.c3
-rw-r--r--src/mainboard/intel/shadowmountain/romstage.c3
-rw-r--r--src/mainboard/prodrive/atlas/romstage_fsp_params.c3
-rw-r--r--src/soc/intel/alderlake/include/soc/romstage.h2
-rw-r--r--src/soc/intel/alderlake/romstage/fsp_params.c4
6 files changed, 11 insertions, 7 deletions
diff --git a/src/mainboard/google/brya/romstage.c b/src/mainboard/google/brya/romstage.c
index d50d6e857167..ae47167ec1c2 100644
--- a/src/mainboard/google/brya/romstage.c
+++ b/src/mainboard/google/brya/romstage.c
@@ -7,8 +7,9 @@
#include <soc/romstage.h>
#include <string.h>
-void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg)
+void mainboard_memory_init_params(FSPM_UPD *memupd)
{
+ FSP_M_CONFIG *m_cfg = &memupd->FspmConfig;
const struct mb_cfg *mem_config = variant_memory_params();
bool half_populated = variant_is_half_populated();
struct mem_spd spd_info;
diff --git a/src/mainboard/intel/adlrvp/romstage_fsp_params.c b/src/mainboard/intel/adlrvp/romstage_fsp_params.c
index 56bd0cd1b643..a0453efd5f02 100644
--- a/src/mainboard/intel/adlrvp/romstage_fsp_params.c
+++ b/src/mainboard/intel/adlrvp/romstage_fsp_params.c
@@ -42,8 +42,9 @@ static void configure_external_clksrc(FSP_M_CONFIG *m_cfg)
m_cfg->PcieClkSrcUsage[i] = CONFIG_CLKSRC_FOR_EXTERNAL_BUFFER;
}
-void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg)
+void mainboard_memory_init_params(FSPM_UPD *memupd)
{
+ FSP_M_CONFIG *m_cfg = &memupd->FspmConfig;
const struct mb_cfg *mem_config = variant_memory_params();
int board_id = get_board_id();
const bool half_populated = false;
diff --git a/src/mainboard/intel/shadowmountain/romstage.c b/src/mainboard/intel/shadowmountain/romstage.c
index 8695b6451fa0..48c20db1ab72 100644
--- a/src/mainboard/intel/shadowmountain/romstage.c
+++ b/src/mainboard/intel/shadowmountain/romstage.c
@@ -7,8 +7,9 @@
#include <soc/meminit.h>
#include <baseboard/variants.h>
-void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg)
+void mainboard_memory_init_params(FSPM_UPD *memupd)
{
+ FSP_M_CONFIG *m_cfg = &memupd->FspmConfig;
const struct mb_cfg *mem_config = variant_memory_params();
const bool half_populated = false;
diff --git a/src/mainboard/prodrive/atlas/romstage_fsp_params.c b/src/mainboard/prodrive/atlas/romstage_fsp_params.c
index 4cd8a127f855..837a52842267 100644
--- a/src/mainboard/prodrive/atlas/romstage_fsp_params.c
+++ b/src/mainboard/prodrive/atlas/romstage_fsp_params.c
@@ -27,8 +27,9 @@ static const struct mb_cfg ddr5_mem_config = {
}
};
-void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg)
+void mainboard_memory_init_params(FSPM_UPD *memupd)
{
+ FSP_M_CONFIG *m_cfg = &memupd->FspmConfig;
const struct mb_cfg *mem_config = &ddr5_mem_config;
const bool half_populated = false;
diff --git a/src/soc/intel/alderlake/include/soc/romstage.h b/src/soc/intel/alderlake/include/soc/romstage.h
index 3b51b69d5232..6504d320859f 100644
--- a/src/soc/intel/alderlake/include/soc/romstage.h
+++ b/src/soc/intel/alderlake/include/soc/romstage.h
@@ -6,7 +6,7 @@
#include <fsp/api.h>
#include <stddef.h>
-void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg);
+void mainboard_memory_init_params(FSPM_UPD *memupd);
void systemagent_early_init(void);
/* Board type */
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c
index 23e82651e3e3..e0f5eb79e7ef 100644
--- a/src/soc/intel/alderlake/romstage/fsp_params.c
+++ b/src/soc/intel/alderlake/romstage/fsp_params.c
@@ -361,10 +361,10 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
config = config_of_soc();
soc_memory_init_params(m_cfg, config);
- mainboard_memory_init_params(m_cfg);
+ mainboard_memory_init_params(mupd);
}
-__weak void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg)
+__weak void mainboard_memory_init_params(FSPM_UPD *memupd)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}