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authorRaul E Rangel <rrangel@chromium.org>2021-12-06 12:15:45 -0700
committerFelix Held <felix-coreboot@felixheld.de>2021-12-08 00:50:48 +0000
commit04cf42775cca3f300dc3e8240bc70e706f091ca0 (patch)
tree6e4a5fae2f5c9c4736af33706e91113f7bc7ae44
parent6ebcdf38724bd1c89cb5e769b54cb50b302b3062 (diff)
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mb/google/zork,soc/amd/psp_verstage: Add verstage_mb_{tpm/espi}_init
These functions can't be weak, because they actually need to configure the GPIOs for eSPI and the TPM. With this change zork boots again. I also noticed that zork doesn't use the early table in bootblock. This means that zork will only boot if psp_verstage is enabled. BUG=b:209465425 TEST=boot zork to ramstage Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I384fd578efe7da0a3d74829cccf38c3ed524f130 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59922 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rob Barnes <robbarnes@google.com>
-rw-r--r--src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c36
-rw-r--r--src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c36
-rw-r--r--src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h6
-rw-r--r--src/mainboard/google/zork/verstage.c25
-rw-r--r--src/soc/amd/common/psp_verstage/psp_verstage.c3
5 files changed, 85 insertions, 21 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
index 5d3e21ffb2fc..45b9e1d876a5 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
@@ -311,25 +311,43 @@ const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp
return gpio_sleep_table;
}
-static const struct soc_amd_gpio early_gpio_table[] = {
- /* H1_FCH_INT_ODL */
- PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS),
- /* I2C3_SCL - H1 */
- PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE),
- /* I2C3_SDA - H1 */
- PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE),
+static const struct soc_amd_gpio espi_gpio_table[] = {
/* PCIE_RST0_L - Fixed timings */
PAD_NF(GPIO_26, PCIE_RST_L, PULL_NONE),
/* FCH_ESPI_EC_CS_L */
PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE),
/* ESPI_ALERT_L */
PAD_NF(GPIO_108, ESPI_ALERT_L, PULL_NONE),
+};
+
+const __weak struct soc_amd_gpio *variant_espi_gpio_table(size_t *size)
+{
+ *size = ARRAY_SIZE(espi_gpio_table);
+ return espi_gpio_table;
+}
+
+static const struct soc_amd_gpio tpm_gpio_table[] = {
+ /* H1_FCH_INT_ODL */
+ PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS),
+ /* I2C3_SCL - H1 */
+ PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE),
+ /* I2C3_SDA - H1 */
+ PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE),
+ /* EC_IN_RW_OD */
+ PAD_GPI(GPIO_11, PULL_NONE),
+};
+
+const __weak struct soc_amd_gpio *variant_tpm_gpio_table(size_t *size)
+{
+ *size = ARRAY_SIZE(tpm_gpio_table);
+ return tpm_gpio_table;
+}
+
+static const struct soc_amd_gpio early_gpio_table[] = {
/* UART0_RXD - DEBUG */
PAD_NF(GPIO_136, UART0_RXD, PULL_NONE),
/* UART0_TXD - DEBUG */
PAD_NF(GPIO_138, UART0_TXD, PULL_NONE),
- /* EC_IN_RW_OD */
- PAD_GPI(GPIO_11, PULL_NONE),
};
const struct soc_amd_gpio *variant_early_gpio_table(size_t *size)
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
index 415c426f157d..7220c380f812 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
@@ -360,25 +360,43 @@ const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp
return gpio_sleep_table;
}
-static const struct soc_amd_gpio early_gpio_table[] = {
- /* H1_FCH_INT_ODL */
- PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS),
- /* I2C3_SCL - H1 */
- PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE),
- /* I2C3_SDA - H1 */
- PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE),
+static const struct soc_amd_gpio espi_gpio_table[] = {
/* PCIE_RST0_L - Fixed timings */
PAD_NF(GPIO_26, PCIE_RST_L, PULL_NONE),
/* FCH_ESPI_EC_CS_L */
PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE),
/* ESPI_ALERT_L */
PAD_NF(GPIO_108, ESPI_ALERT_L, PULL_NONE),
+};
+
+const struct soc_amd_gpio *variant_espi_gpio_table(size_t *size)
+{
+ *size = ARRAY_SIZE(espi_gpio_table);
+ return espi_gpio_table;
+}
+
+static const struct soc_amd_gpio tpm_gpio_table[] = {
+ /* H1_FCH_INT_ODL */
+ PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS),
+ /* I2C3_SCL - H1 */
+ PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE),
+ /* I2C3_SDA - H1 */
+ PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE),
+ /* EC_IN_RW_OD */
+ PAD_GPI(GPIO_130, PULL_NONE),
+};
+
+const struct soc_amd_gpio *variant_tpm_gpio_table(size_t *size)
+{
+ *size = ARRAY_SIZE(tpm_gpio_table);
+ return tpm_gpio_table;
+}
+
+static const struct soc_amd_gpio early_gpio_table[] = {
/* UART0_RXD - DEBUG */
PAD_NF(GPIO_136, UART0_RXD, PULL_NONE),
/* UART0_TXD - DEBUG */
PAD_NF(GPIO_138, UART0_TXD, PULL_NONE),
- /* EC_IN_RW_OD */
- PAD_GPI(GPIO_130, PULL_NONE),
};
const struct soc_amd_gpio *variant_early_gpio_table(size_t *size)
diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h
index 3f7e5d1c340d..38c5d4ad2786 100644
--- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h
@@ -33,6 +33,12 @@ const struct soc_amd_gpio *variant_bootblock_gpio_table(size_t *size, int slp_ty
*/
const struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp_typ);
+/* This function provides GPIO settings for eSPI bus. */
+const struct soc_amd_gpio *variant_espi_gpio_table(size_t *size);
+
+/* This function provides GPIO settings for TPM i2c bus. */
+const struct soc_amd_gpio *variant_tpm_gpio_table(size_t *size);
+
void variant_updm_update(FSP_M_CONFIG *mcfg);
/* Program any required GPIOs at the finalize phase */
diff --git a/src/mainboard/google/zork/verstage.c b/src/mainboard/google/zork/verstage.c
index e1277f4d14e0..06032577e2dd 100644
--- a/src/mainboard/google/zork/verstage.c
+++ b/src/mainboard/google/zork/verstage.c
@@ -2,6 +2,7 @@
#include <amdblocks/gpio.h>
#include <baseboard/variants.h>
+#include <psp_verstage.h>
#include <security/vboot/vboot_common.h>
static void setup_gpio(void)
@@ -19,3 +20,27 @@ void verstage_mainboard_early_init(void)
{
setup_gpio();
}
+
+void verstage_mainboard_espi_init(void)
+{
+ const struct soc_amd_gpio *gpios;
+ size_t num_gpios;
+
+ if (!CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK))
+ return;
+
+ gpios = variant_espi_gpio_table(&num_gpios);
+ gpio_configure_pads(gpios, num_gpios);
+}
+
+void verstage_mainboard_tpm_init(void)
+{
+ const struct soc_amd_gpio *gpios;
+ size_t num_gpios;
+
+ if (!CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK))
+ return;
+
+ gpios = variant_tpm_gpio_table(&num_gpios);
+ gpio_configure_pads(gpios, num_gpios);
+}
diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c
index 2e3d09d3a213..05c14d680832 100644
--- a/src/soc/amd/common/psp_verstage/psp_verstage.c
+++ b/src/soc/amd/common/psp_verstage/psp_verstage.c
@@ -25,9 +25,6 @@
extern char _bss_start, _bss_end;
-void __weak verstage_mainboard_early_init(void) {}
-void __weak verstage_mainboard_espi_init(void) {}
-void __weak verstage_mainboard_tpm_init(void) {}
void __weak verstage_mainboard_init(void) {}
uint32_t __weak get_max_workbuf_size(uint32_t *size)