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authorAngel Pons <th3fanbus@gmail.com>2021-06-04 12:11:26 +0200
committerWerner Zeh <werner.zeh@siemens.com>2021-06-07 04:57:46 +0000
commit151d561dddd99c4e0841789d93f16a7797a7819d (patch)
tree604c5f4dd79254729cc067110c2c7c48f119c2cd
parent00c95b13ab8166c858a237f27077f51ebfcec5b1 (diff)
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cpu/intel/haswell/acpi.c: Do not report P_BLK
Even if IO MWAIT redirection were enabled, the base address is wrong. Moreover, the register resource descriptors for all reported C-states use the FFixedHW address space, not I/O. Change-Id: Ic2faaafbe4928994aeeab8098d8e0fb6703d203d Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55214 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
-rw-r--r--src/cpu/intel/haswell/acpi.c10
1 files changed, 2 insertions, 8 deletions
diff --git a/src/cpu/intel/haswell/acpi.c b/src/cpu/intel/haswell/acpi.c
index 8eec704003e5..f20d446b5c08 100644
--- a/src/cpu/intel/haswell/acpi.c
+++ b/src/cpu/intel/haswell/acpi.c
@@ -333,7 +333,7 @@ static void generate_P_state_entries(int core, int cores_per_package)
void generate_cpu_entries(const struct device *device)
{
- int coreID, cpuID, pcontrol_blk = get_pmbase(), plen = 6;
+ int coreID, cpuID;
int totalcores = dev_count_cpu();
int cores_per_package = get_logical_cores_per_package();
int numcpus = totalcores/cores_per_package;
@@ -343,15 +343,9 @@ void generate_cpu_entries(const struct device *device)
for (cpuID = 1; cpuID <= numcpus; cpuID++) {
for (coreID = 1; coreID <= cores_per_package; coreID++) {
- if (coreID > 1) {
- pcontrol_blk = 0;
- plen = 0;
- }
-
/* Generate processor \_SB.CPUx */
acpigen_write_processor(
- (cpuID - 1) * cores_per_package+coreID - 1,
- pcontrol_blk, plen);
+ (cpuID - 1) * cores_per_package+coreID - 1, 0, 0);
/* Generate P-state tables */
generate_P_state_entries(