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| author | Yu-Ping Wu <yupingso@chromium.org> | 2021-07-15 11:34:43 +0800 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2021-07-16 04:15:53 +0000 |
| commit | 1ce645347caa13f568d67a203dbba6cfaffbd2a1 (patch) | |
| tree | ef84113b2afd2aa39c28556caafc5ba5ea54d168 | |
| parent | 9941e5a5e6d513a39966a129d77bd47925a0f407 (diff) | |
| download | coreboot-1ce645347caa13f568d67a203dbba6cfaffbd2a1.tar.gz coreboot-1ce645347caa13f568d67a203dbba6cfaffbd2a1.tar.bz2 coreboot-1ce645347caa13f568d67a203dbba6cfaffbd2a1.zip | |
mb/google/cherry: Allow payloads to enable USB VBUS
Configure GPIO DGI_D4 (AP_XHCI_INIT_DONE) as output, so that payloads
(for example depthcharge) can assert it to notify EC to enable USB VBUS.
BUG=b:193499785
TEST=emerge-cherry coreboot
BRANCH=none
Change-Id: I21b7b811b8138cb3f71efecb0a0a886905c65a9c
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56326
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
| -rw-r--r-- | src/mainboard/google/cherry/chromeos.c | 1 | ||||
| -rw-r--r-- | src/mainboard/google/cherry/gpio.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/cherry/chromeos.c b/src/mainboard/google/cherry/chromeos.c index 8f0e9aedf458..db7db782a876 100644 --- a/src/mainboard/google/cherry/chromeos.c +++ b/src/mainboard/google/cherry/chromeos.c @@ -17,6 +17,7 @@ void setup_chromeos_gpios(void) gpio_input_pullup(GPIO_GSC_AP_INT); gpio_output(GPIO_EN_SPK, 0); gpio_output(GPIO_RESET, 0); + gpio_output(GPIO_XHCI_DONE, 0); } void fill_lb_gpios(struct lb_gpios *gpios) diff --git a/src/mainboard/google/cherry/gpio.h b/src/mainboard/google/cherry/gpio.h index f07fa38dc9ca..e5465ac147c4 100644 --- a/src/mainboard/google/cherry/gpio.h +++ b/src/mainboard/google/cherry/gpio.h @@ -9,6 +9,7 @@ #define GPIO_WP GPIO(GPIO_05) #define GPIO_SD_CD GPIO(I2SO1_D1) #define GPIO_BEEP_ON GPIO(DMIC1_DAT) +#define GPIO_XHCI_DONE GPIO(DGI_D4) #define GPIO_EC_IN_RW GPIO(DGI_D10) #define GPIO_GSC_AP_INT GPIO(DGI_D11) #define GPIO_EN_SPK GPIO(UART1_RTS) |