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| author | Patrick Huang <patrick.huang@amd.corp-partner.google.com> | 2023-03-22 13:05:32 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-27 12:06:06 +0000 |
| commit | 292e67327649a4c731ea8d65d8ba39a33e8f8cb8 (patch) | |
| tree | dd5f7bde5ae8d2f6b8249f573f9bcf065cfec95c | |
| parent | b6436600ca9e5fb9197fb035bda5c8dfb0843ca3 (diff) | |
| download | coreboot-292e67327649a4c731ea8d65d8ba39a33e8f8cb8.tar.gz coreboot-292e67327649a4c731ea8d65d8ba39a33e8f8cb8.tar.bz2 coreboot-292e67327649a4c731ea8d65d8ba39a33e8f8cb8.zip | |
vc/amd/fsp/mendocino:Add fch_usb_3_port_force_gen1 tp AGESA FSP-M UPD
To add fch_usb_3_port_force_gen1 parameter to force usb3 port to gen1
BUG=b:273841155
BRANCH=None
TEST=Build
Change-Id: I7560abb9a5fda6af3c2814f8b26c92925d8c17f4
Signed-off-by: Patrick Huang <patrick.huang@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73915
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
| -rw-r--r-- | src/vendorcode/amd/fsp/mendocino/FspmUpd.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/vendorcode/amd/fsp/mendocino/FspmUpd.h b/src/vendorcode/amd/fsp/mendocino/FspmUpd.h index bed13afa6358..f7ac83a7e034 100644 --- a/src/vendorcode/amd/fsp/mendocino/FspmUpd.h +++ b/src/vendorcode/amd/fsp/mendocino/FspmUpd.h @@ -100,7 +100,8 @@ typedef struct __packed { /** Offset 0x04DD**/ uint32_t vrm_current_limit_mA; /** Offset 0x04E1**/ uint32_t vrm_maximum_current_limit_mA; /** Offset 0x04E5**/ uint32_t vrm_soc_current_limit_mA; - /** Offset 0x04E9**/ uint8_t UnusedUpdSpace2[279]; + /** Offset 0x04E9**/ uint8_t fch_usb_3_port_force_gen1; + /** Offset 0x04EA**/ uint8_t UnusedUpdSpace2[278]; /** Offset 0x0600**/ uint16_t UpdTerminator; } FSP_M_CONFIG; |