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authorFelix Held <felix-coreboot@felixheld.de>2022-09-29 16:17:53 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-09-30 14:50:03 +0000
commit2e785705f2c3bec3269ef313e7705d79b93b4ae1 (patch)
tree7b8e574b755eeae495deb34222ede8ad0e186ecd
parentb7a4a430c0d89129d48fbc76b3dc9bb554882022 (diff)
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soc/amd/common/psp_verstage/fch: use [read,write]8p to avoid typecasts
Also add missing device/mmio.h include. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I03af0772c735cdc7a4e221770dc528724baa7523 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67983 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
-rw-r--r--src/soc/amd/common/psp_verstage/fch.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/amd/common/psp_verstage/fch.c b/src/soc/amd/common/psp_verstage/fch.c
index fca4c9a0afc0..d4dcd21b3164 100644
--- a/src/soc/amd/common/psp_verstage/fch.c
+++ b/src/soc/amd/common/psp_verstage/fch.c
@@ -12,6 +12,7 @@
#include <bl_uapp/bl_errorcodes_public.h>
#include <bl_uapp/bl_syscall_public.h>
#include <console/console.h>
+#include <device/mmio.h>
#include <soc/i2c.h>
#include <soc/southbridge.h>
#include <stdint.h>
@@ -55,12 +56,12 @@ static void io_set_bar(void *bar)
u8 io_read8(u16 reg)
{
- return read8((void *)(io_bar + reg));
+ return read8p(io_bar + reg);
}
void io_write8(u16 reg, u8 value)
{
- write8((void *)(io_bar + reg), value);
+ write8p(io_bar + reg, value);
}
static void aoac_set_bar(void *bar)