soc/intel/broadwell: Don't use a pointer for pei_data

To improve the bootflow, the scope of the pei_data needs to be
extended.

Change-Id: Ic6d91692a7bf9218b81da5bb36b5b26dabac454e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32762
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>

6 files changed, 10 insertions, 27 deletions

diff --git a/src/mainboard/google/auron/romstage.c b/src/mainboard/google/auron/romstage.c
index 5e1a66ac244c..497489911e2c 100644
--- a/src/mainboard/google/auron/romstage.c
+++ b/src/mainboard/google/auron/romstage.c
@@ -29,15 +29,11 @@ __weak void variant_romstage_entry(struct romstage_params *rp)
 
 void mainboard_romstage_entry(struct romstage_params *rp)
 {
-	struct pei_data pei_data;
-
 	post_code(0x32);
 
 	/* Fill out PEI DATA */
-	memset(&pei_data, 0, sizeof(pei_data));
-	mainboard_fill_pei_data(&pei_data);
-	mainboard_fill_spd_data(&pei_data);
-	rp->pei_data = &pei_data;
+	mainboard_fill_pei_data(&rp->pei_data);
+	mainboard_fill_spd_data(&rp->pei_data);
 
 	/* Call into the real romstage main with this board's attributes. */
 	romstage_common(rp);
diff --git a/src/mainboard/google/jecht/romstage.c b/src/mainboard/google/jecht/romstage.c
index de0ed3057579..8d1ae8aca2ab 100644
--- a/src/mainboard/google/jecht/romstage.c
+++ b/src/mainboard/google/jecht/romstage.c
@@ -29,15 +29,11 @@
 
 void mainboard_romstage_entry(struct romstage_params *rp)
 {
-	struct pei_data pei_data;
-
 	post_code(0x32);
 
 	/* Fill out PEI DATA */
-	memset(&pei_data, 0, sizeof(pei_data));
-	mainboard_fill_pei_data(&pei_data);
-	mainboard_fill_spd_data(&pei_data);
-	rp->pei_data = &pei_data;
+	mainboard_fill_pei_data(&rp->pei_data);
+	mainboard_fill_spd_data(&rp->pei_data);
 
 	/* Call into the real romstage main with this board's attributes. */
 	romstage_common(rp);
diff --git a/src/mainboard/intel/wtm2/romstage.c b/src/mainboard/intel/wtm2/romstage.c
index de4237d222a2..5b8df275d882 100644
--- a/src/mainboard/intel/wtm2/romstage.c
+++ b/src/mainboard/intel/wtm2/romstage.c
@@ -24,14 +24,10 @@
 
 void mainboard_romstage_entry(struct romstage_params *rp)
 {
-	struct pei_data pei_data;
-
 	post_code(0x32);
 
 	/* Fill out PEI DATA */
-	memset(&pei_data, 0, sizeof(pei_data));
-	mainboard_fill_pei_data(&pei_data);
-	rp->pei_data = &pei_data;
+	mainboard_fill_pei_data(&rp->pei_data);
 
 	romstage_common(rp);
 }
diff --git a/src/mainboard/purism/librem_bdw/romstage.c b/src/mainboard/purism/librem_bdw/romstage.c
index 659122962151..5330d191b499 100644
--- a/src/mainboard/purism/librem_bdw/romstage.c
+++ b/src/mainboard/purism/librem_bdw/romstage.c
@@ -20,12 +20,8 @@
 
 void mainboard_romstage_entry(struct romstage_params *rp)
 {
-	struct pei_data pei_data;
-
 	/* Fill out PEI DATA */
-	memset(&pei_data, 0, sizeof(pei_data));
-	mainboard_fill_pei_data(&pei_data);
-	rp->pei_data = &pei_data;
+	mainboard_fill_pei_data(&rp->pei_data);
 
 	/* Initialize memory */
 	romstage_common(rp);
diff --git a/src/soc/intel/broadwell/include/soc/romstage.h b/src/soc/intel/broadwell/include/soc/romstage.h
index 31184f9a02fe..46f29d62df52 100644
--- a/src/soc/intel/broadwell/include/soc/romstage.h
+++ b/src/soc/intel/broadwell/include/soc/romstage.h
@@ -18,13 +18,13 @@
 
 #include <stdint.h>
 #include <arch/cpu.h>
+#include <soc/pei_data.h>
 
 struct chipset_power_state;
-struct pei_data;
 struct romstage_params {
 	unsigned long bist;
 	struct chipset_power_state *power_state;
-	struct pei_data *pei_data;
+	struct pei_data pei_data;
 };
 
 void mainboard_romstage_entry(struct romstage_params *params);
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 7847829ac6e8..2a3ac8b8e691 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -68,7 +68,6 @@ static void romstage_main(uint64_t tsc, uint32_t bist)
 {
 	struct romstage_params rp = {
 		.bist = bist,
-		.pei_data = NULL,
 	};
 
 	post_code(0x30);
@@ -125,7 +124,7 @@ void romstage_common(struct romstage_params *params)
 
 	timestamp_add_now(TS_BEFORE_INITRAM);
 
-	params->pei_data->boot_mode = params->power_state->prev_sleep_state;
+	params->pei_data.boot_mode = params->power_state->prev_sleep_state;
 
 #if CONFIG(ELOG_BOOT_COUNT)
 	if (params->power_state->prev_sleep_state != ACPI_S3)
@@ -140,7 +139,7 @@ void romstage_common(struct romstage_params *params)
 			      &params->power_state->hsio_checksum);
 
 	/* Initialize RAM */
-	raminit(params->pei_data);
+	raminit(&params->pei_data);
 
 	timestamp_add_now(TS_AFTER_INITRAM);