mb/**/dsdt.asl: Remove outdated sleepstates.asl comment

Previously, each Intel chipset had its own sleepstates.asl file.
However, this is no longer the case, so drop these comments.

Change-Id: I50aba6e74f41e2fa498375b5eb6b7e993d06bcac
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37855
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>

86 files changed, 3 insertions, 86 deletions

diff --git a/src/mainboard/apple/macbook21/dsdt.asl b/src/mainboard/apple/macbook21/dsdt.asl
index 7968c6e1995c..97a4b05077a4 100644
--- a/src/mainboard/apple/macbook21/dsdt.asl
+++ b/src/mainboard/apple/macbook21/dsdt.asl
@@ -44,6 +44,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/asrock/g41c-gs/dsdt.asl b/src/mainboard/asrock/g41c-gs/dsdt.asl
index 31e7c10d3efc..cddaa3af4e91 100644
--- a/src/mainboard/asrock/g41c-gs/dsdt.asl
+++ b/src/mainboard/asrock/g41c-gs/dsdt.asl
@@ -37,6 +37,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/asrock/h110m/dsdt.asl b/src/mainboard/asrock/h110m/dsdt.asl
index 0b3baf615329..1f3537e12bb9 100644
--- a/src/mainboard/asrock/h110m/dsdt.asl
+++ b/src/mainboard/asrock/h110m/dsdt.asl
@@ -47,7 +47,6 @@ DefinitionBlock(
 		#include "acpi/dptf.asl"
 	}
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	// Mainboard specific
diff --git a/src/mainboard/asus/p5gc-mx/dsdt.asl b/src/mainboard/asus/p5gc-mx/dsdt.asl
index 1c360f9aea96..0e4bc65093b3 100644
--- a/src/mainboard/asus/p5gc-mx/dsdt.asl
+++ b/src/mainboard/asus/p5gc-mx/dsdt.asl
@@ -48,6 +48,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/asus/p5qc/dsdt.asl b/src/mainboard/asus/p5qc/dsdt.asl
index b9b5adcc245b..75e3b98d6d63 100644
--- a/src/mainboard/asus/p5qc/dsdt.asl
+++ b/src/mainboard/asus/p5qc/dsdt.asl
@@ -37,6 +37,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/asus/p5ql-em/dsdt.asl b/src/mainboard/asus/p5ql-em/dsdt.asl
index 632c6cba2aa9..07f19eca23cb 100644
--- a/src/mainboard/asus/p5ql-em/dsdt.asl
+++ b/src/mainboard/asus/p5ql-em/dsdt.asl
@@ -36,6 +36,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/asus/p5qpl-am/dsdt.asl b/src/mainboard/asus/p5qpl-am/dsdt.asl
index 31e7c10d3efc..cddaa3af4e91 100644
--- a/src/mainboard/asus/p5qpl-am/dsdt.asl
+++ b/src/mainboard/asus/p5qpl-am/dsdt.asl
@@ -37,6 +37,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/facebook/fbg1701/dsdt.asl b/src/mainboard/facebook/fbg1701/dsdt.asl
index 9b4dc817bf7f..6fcb39af2fff 100644
--- a/src/mainboard/facebook/fbg1701/dsdt.asl
+++ b/src/mainboard/facebook/fbg1701/dsdt.asl
@@ -43,7 +43,7 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
+	/* Mainboard specific sleep states */
 	#include "acpi/sleepstates.asl"
 	#include "acpi/mainboard.asl"
 }
diff --git a/src/mainboard/facebook/monolith/dsdt.asl b/src/mainboard/facebook/monolith/dsdt.asl
index 8fea1d511a72..004cc62a0f54 100644
--- a/src/mainboard/facebook/monolith/dsdt.asl
+++ b/src/mainboard/facebook/monolith/dsdt.asl
@@ -45,7 +45,6 @@ DefinitionBlock(
 		#include "acpi/dptf.asl"
 	}
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	// Mainboard specific
diff --git a/src/mainboard/foxconn/d41s/dsdt.asl b/src/mainboard/foxconn/d41s/dsdt.asl
index e07ecc2801f9..a0e9b626f7e9 100644
--- a/src/mainboard/foxconn/d41s/dsdt.asl
+++ b/src/mainboard/foxconn/d41s/dsdt.asl
@@ -37,6 +37,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/foxconn/g41s-k/dsdt.asl b/src/mainboard/foxconn/g41s-k/dsdt.asl
index 31e7c10d3efc..cddaa3af4e91 100644
--- a/src/mainboard/foxconn/g41s-k/dsdt.asl
+++ b/src/mainboard/foxconn/g41s-k/dsdt.asl
@@ -37,6 +37,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/getac/p470/dsdt.asl b/src/mainboard/getac/p470/dsdt.asl
index 9be21ad38a32..ce36c28872b5 100644
--- a/src/mainboard/getac/p470/dsdt.asl
+++ b/src/mainboard/getac/p470/dsdt.asl
@@ -53,6 +53,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl
index 7d0ffe046de2..be640c505e0f 100644
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl
@@ -48,6 +48,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl b/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl
index 31e7c10d3efc..cddaa3af4e91 100644
--- a/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl
@@ -37,6 +37,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/google/auron/dsdt.asl b/src/mainboard/google/auron/dsdt.asl
index b4632145475c..1936a3e04107 100644
--- a/src/mainboard/google/auron/dsdt.asl
+++ b/src/mainboard/google/auron/dsdt.asl
@@ -49,7 +49,6 @@ DefinitionBlock(
 	// Chrome OS specific
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	// Mainboard specific
diff --git a/src/mainboard/google/beltino/dsdt.asl b/src/mainboard/google/beltino/dsdt.asl
index 447ea02150f5..79981254b818 100644
--- a/src/mainboard/google/beltino/dsdt.asl
+++ b/src/mainboard/google/beltino/dsdt.asl
@@ -51,6 +51,5 @@ DefinitionBlock(
 	// Chrome OS specific
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/google/butterfly/dsdt.asl b/src/mainboard/google/butterfly/dsdt.asl
index ad9b77b5f757..b7a8cdfd41c9 100644
--- a/src/mainboard/google/butterfly/dsdt.asl
+++ b/src/mainboard/google/butterfly/dsdt.asl
@@ -52,6 +52,5 @@ DefinitionBlock(
 
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/google/cyan/dsdt.asl b/src/mainboard/google/cyan/dsdt.asl
index 53a92e0a413b..45aeeb42243e 100644
--- a/src/mainboard/google/cyan/dsdt.asl
+++ b/src/mainboard/google/cyan/dsdt.asl
@@ -60,7 +60,6 @@ DefinitionBlock(
 	}
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	#include "acpi/mainboard.asl"
diff --git a/src/mainboard/google/dragonegg/dsdt.asl b/src/mainboard/google/dragonegg/dsdt.asl
index cb2ce64a7810..24814da9f807 100644
--- a/src/mainboard/google/dragonegg/dsdt.asl
+++ b/src/mainboard/google/dragonegg/dsdt.asl
@@ -47,7 +47,6 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 #endif
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Chrome OS Embedded Controller */
diff --git a/src/mainboard/google/drallion/dsdt.asl b/src/mainboard/google/drallion/dsdt.asl
index 92470a925b10..78c6c16a33c4 100644
--- a/src/mainboard/google/drallion/dsdt.asl
+++ b/src/mainboard/google/drallion/dsdt.asl
@@ -52,7 +52,6 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/amac.asl>
 #endif
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Low power idle table */
diff --git a/src/mainboard/google/eve/dsdt.asl b/src/mainboard/google/eve/dsdt.asl
index 90463c85aa6d..5615e43e5446 100644
--- a/src/mainboard/google/eve/dsdt.asl
+++ b/src/mainboard/google/eve/dsdt.asl
@@ -46,7 +46,6 @@ DefinitionBlock(
 	/* Chrome OS specific */
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Chrome OS Embedded Controller */
diff --git a/src/mainboard/google/fizz/dsdt.asl b/src/mainboard/google/fizz/dsdt.asl
index 613fe31b261b..b847df6b9754 100644
--- a/src/mainboard/google/fizz/dsdt.asl
+++ b/src/mainboard/google/fizz/dsdt.asl
@@ -46,7 +46,6 @@ DefinitionBlock(
 	/* Chrome OS specific */
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Chrome OS Embedded Controller */
diff --git a/src/mainboard/google/glados/dsdt.asl b/src/mainboard/google/glados/dsdt.asl
index 06209e4141a2..fbb2371449d8 100644
--- a/src/mainboard/google/glados/dsdt.asl
+++ b/src/mainboard/google/glados/dsdt.asl
@@ -47,7 +47,6 @@ DefinitionBlock(
 	// Chrome OS specific
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	// Mainboard specific
diff --git a/src/mainboard/google/hatch/dsdt.asl b/src/mainboard/google/hatch/dsdt.asl
index 8807191fcb13..1a0ff682127e 100644
--- a/src/mainboard/google/hatch/dsdt.asl
+++ b/src/mainboard/google/hatch/dsdt.asl
@@ -47,7 +47,6 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 #endif
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Low power idle table */
diff --git a/src/mainboard/google/jecht/dsdt.asl b/src/mainboard/google/jecht/dsdt.asl
index 1cd2bd3e57fd..66e66eb31690 100644
--- a/src/mainboard/google/jecht/dsdt.asl
+++ b/src/mainboard/google/jecht/dsdt.asl
@@ -50,7 +50,6 @@ DefinitionBlock(
 	// Chrome OS specific
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	// Mainboard specific
diff --git a/src/mainboard/google/link/dsdt.asl b/src/mainboard/google/link/dsdt.asl
index b39631909eba..a7e60f39cd90 100644
--- a/src/mainboard/google/link/dsdt.asl
+++ b/src/mainboard/google/link/dsdt.asl
@@ -53,6 +53,5 @@ DefinitionBlock(
 
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/google/octopus/dsdt.asl b/src/mainboard/google/octopus/dsdt.asl
index 2b6c33f667b7..b19390913be7 100644
--- a/src/mainboard/google/octopus/dsdt.asl
+++ b/src/mainboard/google/octopus/dsdt.asl
@@ -44,7 +44,6 @@ DefinitionBlock(
 	/* Chrome OS specific */
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Chrome OS Embedded Controller */
diff --git a/src/mainboard/google/parrot/dsdt.asl b/src/mainboard/google/parrot/dsdt.asl
index a7623265c731..f03d010fc9ea 100644
--- a/src/mainboard/google/parrot/dsdt.asl
+++ b/src/mainboard/google/parrot/dsdt.asl
@@ -53,6 +53,5 @@ DefinitionBlock(
 
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/google/poppy/dsdt.asl b/src/mainboard/google/poppy/dsdt.asl
index ce2f8fc43da1..bf8d221832c5 100644
--- a/src/mainboard/google/poppy/dsdt.asl
+++ b/src/mainboard/google/poppy/dsdt.asl
@@ -53,7 +53,6 @@ DefinitionBlock(
 	/* Chrome OS specific */
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Chrome OS Embedded Controller */
diff --git a/src/mainboard/google/rambi/dsdt.asl b/src/mainboard/google/rambi/dsdt.asl
index ed57e4313115..8adde36cd2a5 100644
--- a/src/mainboard/google/rambi/dsdt.asl
+++ b/src/mainboard/google/rambi/dsdt.asl
@@ -46,7 +46,6 @@ DefinitionBlock(
 
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	#include "acpi/mainboard.asl"
diff --git a/src/mainboard/google/reef/dsdt.asl b/src/mainboard/google/reef/dsdt.asl
index 29b816586c53..6de58d85c898 100644
--- a/src/mainboard/google/reef/dsdt.asl
+++ b/src/mainboard/google/reef/dsdt.asl
@@ -44,7 +44,6 @@ DefinitionBlock(
 	/* Chrome OS specific */
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Chrome OS Embedded Controller */
diff --git a/src/mainboard/google/sarien/dsdt.asl b/src/mainboard/google/sarien/dsdt.asl
index 99a862785320..a809b75e01ed 100644
--- a/src/mainboard/google/sarien/dsdt.asl
+++ b/src/mainboard/google/sarien/dsdt.asl
@@ -52,7 +52,6 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/amac.asl>
 #endif
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Low power idle table */
diff --git a/src/mainboard/google/slippy/dsdt.asl b/src/mainboard/google/slippy/dsdt.asl
index 9881a5ff8c8e..010467965eec 100644
--- a/src/mainboard/google/slippy/dsdt.asl
+++ b/src/mainboard/google/slippy/dsdt.asl
@@ -62,6 +62,5 @@ DefinitionBlock(
 	// Chrome OS specific
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/google/stout/dsdt.asl b/src/mainboard/google/stout/dsdt.asl
index a62fed238077..b89766e62d34 100644
--- a/src/mainboard/google/stout/dsdt.asl
+++ b/src/mainboard/google/stout/dsdt.asl
@@ -53,6 +53,5 @@ DefinitionBlock(
 
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/ibase/mb899/dsdt.asl b/src/mainboard/ibase/mb899/dsdt.asl
index 45cc48ff9ad6..7d545798bce2 100644
--- a/src/mainboard/ibase/mb899/dsdt.asl
+++ b/src/mainboard/ibase/mb899/dsdt.asl
@@ -45,6 +45,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/intel/apollolake_rvp/dsdt.asl b/src/mainboard/intel/apollolake_rvp/dsdt.asl
index 9dd8879706cb..ba17f289daca 100644
--- a/src/mainboard/intel/apollolake_rvp/dsdt.asl
+++ b/src/mainboard/intel/apollolake_rvp/dsdt.asl
@@ -32,7 +32,6 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 }
diff --git a/src/mainboard/intel/baskingridge/dsdt.asl b/src/mainboard/intel/baskingridge/dsdt.asl
index 066160d3e141..34b14e23825d 100644
--- a/src/mainboard/intel/baskingridge/dsdt.asl
+++ b/src/mainboard/intel/baskingridge/dsdt.asl
@@ -50,6 +50,5 @@ DefinitionBlock(
 
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/intel/cannonlake_rvp/dsdt.asl b/src/mainboard/intel/cannonlake_rvp/dsdt.asl
index 4fe13d44f64b..26f1565b6aab 100644
--- a/src/mainboard/intel/cannonlake_rvp/dsdt.asl
+++ b/src/mainboard/intel/cannonlake_rvp/dsdt.asl
@@ -43,7 +43,6 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 	#endif
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 }
diff --git a/src/mainboard/intel/coffeelake_rvp/dsdt.asl b/src/mainboard/intel/coffeelake_rvp/dsdt.asl
index 10418c3e648f..58a10d9b90da 100644
--- a/src/mainboard/intel/coffeelake_rvp/dsdt.asl
+++ b/src/mainboard/intel/coffeelake_rvp/dsdt.asl
@@ -43,7 +43,6 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 #endif
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 }
diff --git a/src/mainboard/intel/d510mo/dsdt.asl b/src/mainboard/intel/d510mo/dsdt.asl
index e07ecc2801f9..a0e9b626f7e9 100644
--- a/src/mainboard/intel/d510mo/dsdt.asl
+++ b/src/mainboard/intel/d510mo/dsdt.asl
@@ -37,6 +37,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/intel/d945gclf/dsdt.asl b/src/mainboard/intel/d945gclf/dsdt.asl
index 7d0ffe046de2..be640c505e0f 100644
--- a/src/mainboard/intel/d945gclf/dsdt.asl
+++ b/src/mainboard/intel/d945gclf/dsdt.asl
@@ -48,6 +48,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/intel/dg41wv/dsdt.asl b/src/mainboard/intel/dg41wv/dsdt.asl
index 31e7c10d3efc..cddaa3af4e91 100644
--- a/src/mainboard/intel/dg41wv/dsdt.asl
+++ b/src/mainboard/intel/dg41wv/dsdt.asl
@@ -37,6 +37,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/intel/dg43gt/dsdt.asl b/src/mainboard/intel/dg43gt/dsdt.asl
index f36d1795346b..71d175f70560 100644
--- a/src/mainboard/intel/dg43gt/dsdt.asl
+++ b/src/mainboard/intel/dg43gt/dsdt.asl
@@ -37,6 +37,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/intel/emeraldlake2/dsdt.asl b/src/mainboard/intel/emeraldlake2/dsdt.asl
index a27f21292c5a..baf75b04739a 100644
--- a/src/mainboard/intel/emeraldlake2/dsdt.asl
+++ b/src/mainboard/intel/emeraldlake2/dsdt.asl
@@ -51,6 +51,5 @@ DefinitionBlock(
 
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/intel/glkrvp/dsdt.asl b/src/mainboard/intel/glkrvp/dsdt.asl
index d7711be75d8b..76b3f3295489 100644
--- a/src/mainboard/intel/glkrvp/dsdt.asl
+++ b/src/mainboard/intel/glkrvp/dsdt.asl
@@ -44,7 +44,6 @@ DefinitionBlock(
 	/* Chrome OS specific */
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Chrome OS Embedded Controller */
diff --git a/src/mainboard/intel/harcuvar/dsdt.asl b/src/mainboard/intel/harcuvar/dsdt.asl
index bd32687cb851..f970df936d2c 100644
--- a/src/mainboard/intel/harcuvar/dsdt.asl
+++ b/src/mainboard/intel/harcuvar/dsdt.asl
@@ -49,6 +49,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/intel/icelake_rvp/dsdt.asl b/src/mainboard/intel/icelake_rvp/dsdt.asl
index 3fd6fcae24e5..2eab610c4250 100644
--- a/src/mainboard/intel/icelake_rvp/dsdt.asl
+++ b/src/mainboard/intel/icelake_rvp/dsdt.asl
@@ -58,7 +58,6 @@ DefinitionBlock(
 		}
 #endif
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	// Mainboard specific
diff --git a/src/mainboard/intel/kblrvp/dsdt.asl b/src/mainboard/intel/kblrvp/dsdt.asl
index 84872cb62d12..e34b6c768f00 100644
--- a/src/mainboard/intel/kblrvp/dsdt.asl
+++ b/src/mainboard/intel/kblrvp/dsdt.asl
@@ -55,7 +55,6 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 #endif
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	// Mainboard specific
diff --git a/src/mainboard/intel/kunimitsu/dsdt.asl b/src/mainboard/intel/kunimitsu/dsdt.asl
index 06209e4141a2..fbb2371449d8 100644
--- a/src/mainboard/intel/kunimitsu/dsdt.asl
+++ b/src/mainboard/intel/kunimitsu/dsdt.asl
@@ -47,7 +47,6 @@ DefinitionBlock(
 	// Chrome OS specific
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	// Mainboard specific
diff --git a/src/mainboard/intel/leafhill/dsdt.asl b/src/mainboard/intel/leafhill/dsdt.asl
index 6fccf4917c65..94dc024b3231 100644
--- a/src/mainboard/intel/leafhill/dsdt.asl
+++ b/src/mainboard/intel/leafhill/dsdt.asl
@@ -38,6 +38,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/intel/minnow3/dsdt.asl b/src/mainboard/intel/minnow3/dsdt.asl
index 6fccf4917c65..94dc024b3231 100644
--- a/src/mainboard/intel/minnow3/dsdt.asl
+++ b/src/mainboard/intel/minnow3/dsdt.asl
@@ -38,6 +38,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/intel/saddlebrook/dsdt.asl b/src/mainboard/intel/saddlebrook/dsdt.asl
index b88b1d20f406..8d6dc2e6dde1 100644
--- a/src/mainboard/intel/saddlebrook/dsdt.asl
+++ b/src/mainboard/intel/saddlebrook/dsdt.asl
@@ -41,7 +41,6 @@ DefinitionBlock(
 		}
 	}
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	// Mainboard specific
diff --git a/src/mainboard/intel/strago/dsdt.asl b/src/mainboard/intel/strago/dsdt.asl
index 7bbe1e407c5b..0028fd7a532d 100644
--- a/src/mainboard/intel/strago/dsdt.asl
+++ b/src/mainboard/intel/strago/dsdt.asl
@@ -56,7 +56,6 @@ DefinitionBlock(
 	}
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	#include "acpi/mainboard.asl"
diff --git a/src/mainboard/intel/wtm2/dsdt.asl b/src/mainboard/intel/wtm2/dsdt.asl
index 7245983ba0d8..6bfc1728481b 100644
--- a/src/mainboard/intel/wtm2/dsdt.asl
+++ b/src/mainboard/intel/wtm2/dsdt.asl
@@ -53,7 +53,6 @@ DefinitionBlock(
 	// Chrome OS specific
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	// Mainboard specific
diff --git a/src/mainboard/kontron/986lcd-m/dsdt.asl b/src/mainboard/kontron/986lcd-m/dsdt.asl
index a6ae2843fefa..10f4208cff37 100644
--- a/src/mainboard/kontron/986lcd-m/dsdt.asl
+++ b/src/mainboard/kontron/986lcd-m/dsdt.asl
@@ -44,6 +44,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/kontron/ktqm77/dsdt.asl b/src/mainboard/kontron/ktqm77/dsdt.asl
index da533b789eab..b297a1216034 100644
--- a/src/mainboard/kontron/ktqm77/dsdt.asl
+++ b/src/mainboard/kontron/ktqm77/dsdt.asl
@@ -50,6 +50,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/lenovo/t400/dsdt.asl b/src/mainboard/lenovo/t400/dsdt.asl
index c3c7dda6ae54..edf69ab35945 100644
--- a/src/mainboard/lenovo/t400/dsdt.asl
+++ b/src/mainboard/lenovo/t400/dsdt.asl
@@ -51,7 +51,6 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Hybrid graphics support code */
diff --git a/src/mainboard/lenovo/t410/dsdt.asl b/src/mainboard/lenovo/t410/dsdt.asl
index bf00489e8058..4f67bd8150d7 100644
--- a/src/mainboard/lenovo/t410/dsdt.asl
+++ b/src/mainboard/lenovo/t410/dsdt.asl
@@ -85,7 +85,6 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Dock support code */
diff --git a/src/mainboard/lenovo/t420/dsdt.asl b/src/mainboard/lenovo/t420/dsdt.asl
index b8418179b493..43cb236439d2 100644
--- a/src/mainboard/lenovo/t420/dsdt.asl
+++ b/src/mainboard/lenovo/t420/dsdt.asl
@@ -50,6 +50,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/lenovo/t420s/dsdt.asl b/src/mainboard/lenovo/t420s/dsdt.asl
index b8418179b493..43cb236439d2 100644
--- a/src/mainboard/lenovo/t420s/dsdt.asl
+++ b/src/mainboard/lenovo/t420s/dsdt.asl
@@ -50,6 +50,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/lenovo/t430s/dsdt.asl b/src/mainboard/lenovo/t430s/dsdt.asl
index b8418179b493..43cb236439d2 100644
--- a/src/mainboard/lenovo/t430s/dsdt.asl
+++ b/src/mainboard/lenovo/t430s/dsdt.asl
@@ -50,6 +50,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/lenovo/t520/dsdt.asl b/src/mainboard/lenovo/t520/dsdt.asl
index b8418179b493..43cb236439d2 100644
--- a/src/mainboard/lenovo/t520/dsdt.asl
+++ b/src/mainboard/lenovo/t520/dsdt.asl
@@ -50,6 +50,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/lenovo/t530/dsdt.asl b/src/mainboard/lenovo/t530/dsdt.asl
index b8418179b493..43cb236439d2 100644
--- a/src/mainboard/lenovo/t530/dsdt.asl
+++ b/src/mainboard/lenovo/t530/dsdt.asl
@@ -50,6 +50,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/lenovo/t60/dsdt.asl b/src/mainboard/lenovo/t60/dsdt.asl
index 13742167e830..749f852edfe5 100644
--- a/src/mainboard/lenovo/t60/dsdt.asl
+++ b/src/mainboard/lenovo/t60/dsdt.asl
@@ -57,7 +57,6 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	// Dock support code
diff --git a/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl b/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl
index 31e7c10d3efc..cddaa3af4e91 100644
--- a/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl
+++ b/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl
@@ -37,6 +37,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/lenovo/x131e/dsdt.asl b/src/mainboard/lenovo/x131e/dsdt.asl
index 842afff8965d..ff80f1599cbf 100644
--- a/src/mainboard/lenovo/x131e/dsdt.asl
+++ b/src/mainboard/lenovo/x131e/dsdt.asl
@@ -39,7 +39,6 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	Scope (\_SB) {
diff --git a/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl b/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl
index 96f7e35cddf8..de6866d1adfb 100644
--- a/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl
+++ b/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl
@@ -50,6 +50,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/lenovo/x200/dsdt.asl b/src/mainboard/lenovo/x200/dsdt.asl
index 9052a8f3b829..1290ece4b358 100644
--- a/src/mainboard/lenovo/x200/dsdt.asl
+++ b/src/mainboard/lenovo/x200/dsdt.asl
@@ -50,7 +50,6 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Dock support code */
diff --git a/src/mainboard/lenovo/x201/dsdt.asl b/src/mainboard/lenovo/x201/dsdt.asl
index bf00489e8058..4f67bd8150d7 100644
--- a/src/mainboard/lenovo/x201/dsdt.asl
+++ b/src/mainboard/lenovo/x201/dsdt.asl
@@ -85,7 +85,6 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Dock support code */
diff --git a/src/mainboard/lenovo/x220/dsdt.asl b/src/mainboard/lenovo/x220/dsdt.asl
index b8418179b493..43cb236439d2 100644
--- a/src/mainboard/lenovo/x220/dsdt.asl
+++ b/src/mainboard/lenovo/x220/dsdt.asl
@@ -50,6 +50,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/lenovo/x230/dsdt.asl b/src/mainboard/lenovo/x230/dsdt.asl
index b8418179b493..43cb236439d2 100644
--- a/src/mainboard/lenovo/x230/dsdt.asl
+++ b/src/mainboard/lenovo/x230/dsdt.asl
@@ -50,6 +50,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/lenovo/x60/dsdt.asl b/src/mainboard/lenovo/x60/dsdt.asl
index 6f01f600520f..32465d3ef459 100644
--- a/src/mainboard/lenovo/x60/dsdt.asl
+++ b/src/mainboard/lenovo/x60/dsdt.asl
@@ -51,7 +51,6 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	// Dock support code
diff --git a/src/mainboard/packardbell/ms2290/dsdt.asl b/src/mainboard/packardbell/ms2290/dsdt.asl
index cbfd3a7439db..bbd2b2938c58 100644
--- a/src/mainboard/packardbell/ms2290/dsdt.asl
+++ b/src/mainboard/packardbell/ms2290/dsdt.asl
@@ -79,6 +79,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/portwell/m107/dsdt.asl b/src/mainboard/portwell/m107/dsdt.asl
index 9b4dc817bf7f..6fcb39af2fff 100644
--- a/src/mainboard/portwell/m107/dsdt.asl
+++ b/src/mainboard/portwell/m107/dsdt.asl
@@ -43,7 +43,7 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
+	/* Mainboard specific sleep states */
 	#include "acpi/sleepstates.asl"
 	#include "acpi/mainboard.asl"
 }
diff --git a/src/mainboard/purism/librem_bdw/dsdt.asl b/src/mainboard/purism/librem_bdw/dsdt.asl
index 3a53a4db28d5..0e5d7a1fc677 100644
--- a/src/mainboard/purism/librem_bdw/dsdt.asl
+++ b/src/mainboard/purism/librem_bdw/dsdt.asl
@@ -39,7 +39,6 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Mainboard specific */
diff --git a/src/mainboard/purism/librem_skl/dsdt.asl b/src/mainboard/purism/librem_skl/dsdt.asl
index b058204fafee..0f78d5f7f1bf 100644
--- a/src/mainboard/purism/librem_skl/dsdt.asl
+++ b/src/mainboard/purism/librem_skl/dsdt.asl
@@ -42,7 +42,6 @@ DefinitionBlock(
 
 	}
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	// Mainboard specific
diff --git a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl
index 01126549508b..ef487451ea60 100644
--- a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl
+++ b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl
@@ -42,7 +42,7 @@ DefinitionBlock(
 		}
 
 	}
-	// Chipset specific sleep states
+
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	#include "acpi/mainboard.asl"
diff --git a/src/mainboard/roda/rk886ex/dsdt.asl b/src/mainboard/roda/rk886ex/dsdt.asl
index 7011b44c6e91..a27ba350fa47 100644
--- a/src/mainboard/roda/rk886ex/dsdt.asl
+++ b/src/mainboard/roda/rk886ex/dsdt.asl
@@ -49,6 +49,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/roda/rk9/dsdt.asl b/src/mainboard/roda/rk9/dsdt.asl
index 0206926ff38a..c9bd5c7d18d8 100644
--- a/src/mainboard/roda/rk9/dsdt.asl
+++ b/src/mainboard/roda/rk9/dsdt.asl
@@ -51,6 +51,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/roda/rv11/dsdt.asl b/src/mainboard/roda/rv11/dsdt.asl
index 1784b540c92e..fb3b2279494d 100644
--- a/src/mainboard/roda/rv11/dsdt.asl
+++ b/src/mainboard/roda/rv11/dsdt.asl
@@ -48,6 +48,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/samsung/lumpy/dsdt.asl b/src/mainboard/samsung/lumpy/dsdt.asl
index 3ecabb59351e..eaa36468e98f 100644
--- a/src/mainboard/samsung/lumpy/dsdt.asl
+++ b/src/mainboard/samsung/lumpy/dsdt.asl
@@ -54,6 +54,5 @@ DefinitionBlock(
 
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/samsung/stumpy/dsdt.asl b/src/mainboard/samsung/stumpy/dsdt.asl
index 9fc9e2f9ff7a..1298368ee0c2 100644
--- a/src/mainboard/samsung/stumpy/dsdt.asl
+++ b/src/mainboard/samsung/stumpy/dsdt.asl
@@ -51,6 +51,5 @@ DefinitionBlock(
 
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/scaleway/tagada/dsdt.asl b/src/mainboard/scaleway/tagada/dsdt.asl
index bd32687cb851..f970df936d2c 100644
--- a/src/mainboard/scaleway/tagada/dsdt.asl
+++ b/src/mainboard/scaleway/tagada/dsdt.asl
@@ -49,6 +49,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/siemens/mc_apl1/dsdt.asl b/src/mainboard/siemens/mc_apl1/dsdt.asl
index ae40f3951487..8e08b1662683 100644
--- a/src/mainboard/siemens/mc_apl1/dsdt.asl
+++ b/src/mainboard/siemens/mc_apl1/dsdt.asl
@@ -40,6 +40,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
diff --git a/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl b/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl
index b88b1d20f406..8d6dc2e6dde1 100644
--- a/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl
+++ b/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl
@@ -41,7 +41,6 @@ DefinitionBlock(
 		}
 	}
 
-	// Chipset specific sleep states
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	// Mainboard specific
diff --git a/src/mainboard/up/squared/dsdt.asl b/src/mainboard/up/squared/dsdt.asl
index 6fccf4917c65..94dc024b3231 100644
--- a/src/mainboard/up/squared/dsdt.asl
+++ b/src/mainboard/up/squared/dsdt.asl
@@ -38,6 +38,5 @@ DefinitionBlock(
 		}
 	}
 
-	/* Chipset specific sleep states */
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }