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| author | Wisley Chen <wisley.chen@quanta.corp-partner.google.com> | 2021-10-25 09:12:02 +0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-27 14:07:28 +0000 |
| commit | 41e8e8aaccd71cdbecfbd272173e4c8ff9e79d0b (patch) | |
| tree | e43197d64e77e2e9aec95ca83f81b9e36b045710 | |
| parent | 99165592c420e7090ab2f9d94f2e935c384b6a67 (diff) | |
| download | coreboot-41e8e8aaccd71cdbecfbd272173e4c8ff9e79d0b.tar.gz coreboot-41e8e8aaccd71cdbecfbd272173e4c8ff9e79d0b.tar.bz2 coreboot-41e8e8aaccd71cdbecfbd272173e4c8ff9e79d0b.zip | |
mb/google/dedede/var/drawcia: Generate new SPD ID for new memory parts
Add new memory parts in memory_parts_used.txt and generate SPD id for
these parts:
Hynix H54G46CYRBX267
Samsung K4U6E3S4AB-MGCL
BUG=b:204014463
TEST=run part_id_gen to generate SPD id
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Change-Id: I43df98d84c6a274d6f96c8818ce6acff9337d8d3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58565
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
3 files changed, 7 insertions, 3 deletions
diff --git a/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc b/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc index 015541bef406..96284d1923a4 100644 --- a/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc +++ b/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/drawcia/memory src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt +# ./util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/drawcia/memory src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt SPD_SOURCES = -SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR, MT53E512M32D1NP-046 WT:B +SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR, MT53E512M32D1NP-046 WT:B, H54G46CYRBX267, K4U6E3S4AB-MGCL diff --git a/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt index bcdc7623c776..78cc95d72318 100644 --- a/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt +++ b/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt @@ -1,10 +1,12 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/drawcia/memory src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt +# ./util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/drawcia/memory src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt DRAM Part Name ID to assign MT53E512M32D2NP-046 WT:E 0 (0000) H9HCNNNBKMMLXR-NEE 0 (0000) K4U6E3S4AA-MGCR 0 (0000) MT53E512M32D1NP-046 WT:B 0 (0000) +H54G46CYRBX267 0 (0000) +K4U6E3S4AB-MGCL 0 (0000) diff --git a/src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt b/src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt index 09ed38129d44..f195c2526e3b 100644 --- a/src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt +++ b/src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt @@ -2,3 +2,5 @@ MT53E512M32D2NP-046 WT:E H9HCNNNBKMMLXR-NEE K4U6E3S4AA-MGCR MT53E512M32D1NP-046 WT:B +H54G46CYRBX267 +K4U6E3S4AB-MGCL |