AMD hudson and yangtze boards: Let mainboard declare power button

The power button was declared by hudson's ASL as \_SB.PCI0.PWRB, and
always had the wake source declared as GPE3. This is not the correct
wake source for all boards. On some laptops declaring a wake source is
not needed, as the wake mechanism is handled by the EC.

Move the declaration of the power button to mainboard ASL files, and
scope it as \_SB.PWRB . This also makes the naming consistent with the
examples in the ACPI spec. The wake source for the PWRB of HP Pavilion
M6 1035dx is removed, as it is incorrect.

Change-Id: I9c76566025e7f200c0376673f6c6ea299afa4a5d
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5546
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>

13 files changed, 64 insertions, 30 deletions

diff --git a/src/mainboard/amd/olivehill/acpi/gpe.asl b/src/mainboard/amd/olivehill/acpi/gpe.asl
index f29450222d16..8d4f8a2159f6 100644
--- a/src/mainboard/amd/olivehill/acpi/gpe.asl
+++ b/src/mainboard/amd/olivehill/acpi/gpe.asl
@@ -22,7 +22,7 @@ Scope(\_GPE) {	/* Start Scope GPE */
 	/*  General event 3  */
 	Method(_L03) {
 		/* DBGO("\\_GPE\\_L00\n") */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  Legacy PM event  */
@@ -46,7 +46,7 @@ Scope(\_GPE) {	/* Start Scope GPE */
 		Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.XHC0, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  ExtEvent0 SCI event  */
@@ -66,13 +66,13 @@ Scope(\_GPE) {	/* Start Scope GPE */
 		Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  Azalia SCI event  */
 	Method(_L1B) {
 		/* DBGO("\\_GPE\\_L1B\n") */
 		Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 } 	/* End Scope GPE */
diff --git a/src/mainboard/amd/olivehill/dsdt.asl b/src/mainboard/amd/olivehill/dsdt.asl
index e0c21cf09f22..d2d812263141 100644
--- a/src/mainboard/amd/olivehill/dsdt.asl
+++ b/src/mainboard/amd/olivehill/dsdt.asl
@@ -56,6 +56,13 @@ DefinitionBlock (
 		/* Describe IRQ Routing mapping for this platform (within the \_SB scope) */
 		#include "acpi/routing.asl"
 
+		Device(PWRB) {
+			Name(_HID, EISAID("PNP0C0C"))
+			Name(_UID, 0xAA)
+			Name(_PRW, Package () {3, 0x04})
+			Name(_STA, 0x0B)
+		}
+
 		Device(PCI0) {
 			/* Describe the AMD Northbridge */
 			#include <northbridge/amd/agesa/family16kb/acpi/northbridge.asl>
diff --git a/src/mainboard/amd/parmer/acpi/gpe.asl b/src/mainboard/amd/parmer/acpi/gpe.asl
index 40a19d405a3f..22a3957cbe31 100644
--- a/src/mainboard/amd/parmer/acpi/gpe.asl
+++ b/src/mainboard/amd/parmer/acpi/gpe.asl
@@ -22,7 +22,7 @@ Scope(\_GPE) {	/* Start Scope GPE */
 	/*  General event 3  */
 	Method(_L03) {
 		/* DBGO("\\_GPE\\_L00\n") */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  Legacy PM event  */
@@ -46,7 +46,7 @@ Scope(\_GPE) {	/* Start Scope GPE */
 		Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  ExtEvent0 SCI event  */
@@ -67,13 +67,13 @@ Scope(\_GPE) {	/* Start Scope GPE */
 		Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  Azalia SCI event  */
 	Method(_L1B) {
 		/* DBGO("\\_GPE\\_L1B\n") */
 		Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 } 	/* End Scope GPE */
diff --git a/src/mainboard/amd/parmer/dsdt.asl b/src/mainboard/amd/parmer/dsdt.asl
index ef2ae6f8e63b..21b2090beeae 100644
--- a/src/mainboard/amd/parmer/dsdt.asl
+++ b/src/mainboard/amd/parmer/dsdt.asl
@@ -55,6 +55,13 @@ DefinitionBlock (
 		/* Describe IRQ Routing mapping for this platform (within the \_SB scope) */
 		#include "acpi/routing.asl"
 
+		Device(PWRB) {
+			Name(_HID, EISAID("PNP0C0C"))
+			Name(_UID, 0xAA)
+			Name(_PRW, Package () {3, 0x04})
+			Name(_STA, 0x0B)
+		}
+
 		Device(PCI0) {
 			/* Describe the AMD Northbridge */
 			#include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl>
diff --git a/src/mainboard/amd/thatcher/acpi/gpe.asl b/src/mainboard/amd/thatcher/acpi/gpe.asl
index 40a19d405a3f..22a3957cbe31 100644
--- a/src/mainboard/amd/thatcher/acpi/gpe.asl
+++ b/src/mainboard/amd/thatcher/acpi/gpe.asl
@@ -22,7 +22,7 @@ Scope(\_GPE) {	/* Start Scope GPE */
 	/*  General event 3  */
 	Method(_L03) {
 		/* DBGO("\\_GPE\\_L00\n") */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  Legacy PM event  */
@@ -46,7 +46,7 @@ Scope(\_GPE) {	/* Start Scope GPE */
 		Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  ExtEvent0 SCI event  */
@@ -67,13 +67,13 @@ Scope(\_GPE) {	/* Start Scope GPE */
 		Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  Azalia SCI event  */
 	Method(_L1B) {
 		/* DBGO("\\_GPE\\_L1B\n") */
 		Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 } 	/* End Scope GPE */
diff --git a/src/mainboard/amd/thatcher/dsdt.asl b/src/mainboard/amd/thatcher/dsdt.asl
index ef2ae6f8e63b..21b2090beeae 100644
--- a/src/mainboard/amd/thatcher/dsdt.asl
+++ b/src/mainboard/amd/thatcher/dsdt.asl
@@ -55,6 +55,13 @@ DefinitionBlock (
 		/* Describe IRQ Routing mapping for this platform (within the \_SB scope) */
 		#include "acpi/routing.asl"
 
+		Device(PWRB) {
+			Name(_HID, EISAID("PNP0C0C"))
+			Name(_UID, 0xAA)
+			Name(_PRW, Package () {3, 0x04})
+			Name(_STA, 0x0B)
+		}
+
 		Device(PCI0) {
 			/* Describe the AMD Northbridge */
 			#include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl>
diff --git a/src/mainboard/asrock/imb-a180/acpi/gpe.asl b/src/mainboard/asrock/imb-a180/acpi/gpe.asl
index f29450222d16..8d4f8a2159f6 100644
--- a/src/mainboard/asrock/imb-a180/acpi/gpe.asl
+++ b/src/mainboard/asrock/imb-a180/acpi/gpe.asl
@@ -22,7 +22,7 @@ Scope(\_GPE) {	/* Start Scope GPE */
 	/*  General event 3  */
 	Method(_L03) {
 		/* DBGO("\\_GPE\\_L00\n") */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  Legacy PM event  */
@@ -46,7 +46,7 @@ Scope(\_GPE) {	/* Start Scope GPE */
 		Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.XHC0, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  ExtEvent0 SCI event  */
@@ -66,13 +66,13 @@ Scope(\_GPE) {	/* Start Scope GPE */
 		Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  Azalia SCI event  */
 	Method(_L1B) {
 		/* DBGO("\\_GPE\\_L1B\n") */
 		Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 } 	/* End Scope GPE */
diff --git a/src/mainboard/asrock/imb-a180/dsdt.asl b/src/mainboard/asrock/imb-a180/dsdt.asl
index 78d9bcacd541..cecaa59631db 100644
--- a/src/mainboard/asrock/imb-a180/dsdt.asl
+++ b/src/mainboard/asrock/imb-a180/dsdt.asl
@@ -56,6 +56,13 @@ DefinitionBlock (
 		/* Describe IRQ Routing mapping for this platform (within the \_SB scope) */
 		#include "acpi/routing.asl"
 
+		Device(PWRB) {
+			Name(_HID, EISAID("PNP0C0C"))
+			Name(_UID, 0xAA)
+			Name(_PRW, Package () {3, 0x04})
+			Name(_STA, 0x0B)
+		}
+
 		Device(PCI0) {
 			/* Describe the AMD Northbridge */
 			#include <northbridge/amd/agesa/family16kb/acpi/northbridge.asl>
diff --git a/src/mainboard/asus/f2a85-m/acpi/gpe.asl b/src/mainboard/asus/f2a85-m/acpi/gpe.asl
index 956d5d1d091e..a5ec91a3a61f 100644
--- a/src/mainboard/asus/f2a85-m/acpi/gpe.asl
+++ b/src/mainboard/asus/f2a85-m/acpi/gpe.asl
@@ -22,7 +22,7 @@ Scope(\_GPE) {	/* Start Scope GPE */
 	/*  General event 3  */
 	Method(_L03) {
 		/* DBGO("\\_GPE\\_L00\n") */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  Legacy PM event  */
@@ -46,7 +46,7 @@ Scope(\_GPE) {	/* Start Scope GPE */
 		Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  ExtEvent0 SCI event  */
@@ -64,13 +64,13 @@ Scope(\_GPE) {	/* Start Scope GPE */
 	Method(_L18) {
 		/* DBGO("\\_GPE\\_L18\n") */
 		Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  Azalia SCI event  */
 	Method(_L1B) {
 		/* DBGO("\\_GPE\\_L1B\n") */
 		Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 } 	/* End Scope GPE */
diff --git a/src/mainboard/asus/f2a85-m/dsdt.asl b/src/mainboard/asus/f2a85-m/dsdt.asl
index bb9c0fe1548a..a1a95b200676 100644
--- a/src/mainboard/asus/f2a85-m/dsdt.asl
+++ b/src/mainboard/asus/f2a85-m/dsdt.asl
@@ -55,6 +55,13 @@ DefinitionBlock (
 		/* Describe IRQ Routing mapping for this platform (within the \_SB scope) */
 		#include "acpi/routing.asl"
 
+		Device(PWRB) {
+			Name(_HID, EISAID("PNP0C0C"))
+			Name(_UID, 0xAA)
+			Name(_PRW, Package () {3, 0x04})
+			Name(_STA, 0x0B)
+		}
+
 		Device(PCI0) {
 			/* Describe the AMD Northbridge */
 			#include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl>
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/acpi/gpe.asl b/src/mainboard/hp/pavilion_m6_1035dx/acpi/gpe.asl
index f228691fc3c0..7a78485f5a1e 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/acpi/gpe.asl
+++ b/src/mainboard/hp/pavilion_m6_1035dx/acpi/gpe.asl
@@ -40,7 +40,7 @@ Scope(\_GPE) {	/* Start Scope GPE */
 		Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  ExtEvent0 SCI event  */
@@ -70,13 +70,13 @@ Scope(\_GPE) {	/* Start Scope GPE */
 		Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  Azalia SCI event  */
 	Method(_L1B) {
 		/* DBGO("\\_GPE\\_L1B\n") */
 		Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
+		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 } 	/* End Scope GPE */
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl b/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl
index ecca0872ff82..16b6c79a60b8 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl
+++ b/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl
@@ -98,6 +98,12 @@ Scope (\_SB) {
 		}
 	}
 
+	Device(PWRB) {
+		Name(_HID, EisaId("PNP0C0C"))
+		Name(_UID, 0xAA)
+		Name(_STA, 0x0B)
+	}
+
 	Device (MB) {
 		/* Lid open */
 		Method (LIDO) { /* Stub */ }
diff --git a/src/southbridge/amd/agesa/hudson/acpi/fch.asl b/src/southbridge/amd/agesa/hudson/acpi/fch.asl
index f56b69c29117..b04bc5955736 100644
--- a/src/southbridge/amd/agesa/hudson/acpi/fch.asl
+++ b/src/southbridge/amd/agesa/hudson/acpi/fch.asl
@@ -204,10 +204,3 @@ Method(CkOT, 0){
 	}
 	Return(OSTP)
 }
-
-Device(PWRB) {	/* Start Power button device */
-	Name(_HID, EISAID("PNP0C0C"))
-	Name(_UID, 0xAA)
-	Name(_PRW, Package () {3, 0x04})	/* wake from S1-S4 */
-	Name(_STA, 0x0B)	/* sata is invisible */
-}