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| author | Amanda Huang <amanda_hwang@compal.corp-partner.google.com> | 2023-03-13 11:05:29 +0800 |
|---|---|---|
| committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2023-03-14 01:23:06 +0000 |
| commit | 48286abfc1299cd2e8a71461caa34b4ea8b8e69c (patch) | |
| tree | 87ee2fc4c7a84dc6a877707292beb681b6f6b750 | |
| parent | e5fa3b1680c10a350b83a12e78a844326a146cfc (diff) | |
| download | coreboot-48286abfc1299cd2e8a71461caa34b4ea8b8e69c.tar.gz coreboot-48286abfc1299cd2e8a71461caa34b4ea8b8e69c.tar.bz2 coreboot-48286abfc1299cd2e8a71461caa34b4ea8b8e69c.zip | |
mb/google/dedede/var/dibbi: Configure I2C times for audio
Configure the I2C bus high and low time for audio.
BUG=b:271804915
BRANCH=dedede
TEST=Build and confirm I2C clock for audio is between 380 kHz and 400
kHz
Change-Id: I2987a39abc5527844424edfa1cf70d5c5cea5357
Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73701
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
| -rw-r--r-- | src/mainboard/google/dedede/variants/dibbi/overridetree.cb | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/mainboard/google/dedede/variants/dibbi/overridetree.cb b/src/mainboard/google/dedede/variants/dibbi/overridetree.cb index 8e7a993e0d07..e3df1f2d17ea 100644 --- a/src/mainboard/google/dedede/variants/dibbi/overridetree.cb +++ b/src/mainboard/google/dedede/variants/dibbi/overridetree.cb @@ -16,7 +16,12 @@ chip soc/intel/jasperlake .early_init = 1, }, .i2c[4] = { - .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 190, + .scl_hcnt = 100, + .sda_hold = 40, + } }, }" |