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| author | Angel Pons <th3fanbus@gmail.com> | 2021-03-30 21:18:30 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-04-11 21:04:46 +0000 |
| commit | 527b68219f57f61d1b3f5b50779d22b170ac0f96 (patch) | |
| tree | 5444e3ce87172a230f89abd891006e9c6a2dd8ad | |
| parent | 544d7e2b9136adcf0e17c41447c9c13a31c9dae1 (diff) | |
| download | coreboot-527b68219f57f61d1b3f5b50779d22b170ac0f96.tar.gz coreboot-527b68219f57f61d1b3f5b50779d22b170ac0f96.tar.bz2 coreboot-527b68219f57f61d1b3f5b50779d22b170ac0f96.zip | |
sb/intel/x/smbus.c: Correct register access width
The register is 16 bits wide.
Change-Id: I58d44a17613965e0a27aab5246dcdce68e1a8201
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51950
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
| -rw-r--r-- | src/southbridge/intel/bd82x6x/smbus.c | 6 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/smbus.c | 5 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/smbus.c | 6 |
3 files changed, 3 insertions, 14 deletions
diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c index 9ba9e12eb581..839b0c3df045 100644 --- a/src/southbridge/intel/bd82x6x/smbus.c +++ b/src/southbridge/intel/bd82x6x/smbus.c @@ -14,13 +14,9 @@ static void pch_smbus_init(struct device *dev) { struct resource *res; - u16 reg16; /* Enable clock gating */ - /* FIXME: Using 32-bit ops with a 16-bit variable is a bug! These should be 16-bit! */ - reg16 = pci_read_config32(dev, 0x80); - reg16 &= ~((1 << 8)|(1 << 10)|(1 << 12)|(1 << 14)); - pci_write_config32(dev, 0x80, reg16); + pci_and_config16(dev, 0x80, ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14))); /* Set Receive Slave Address */ res = find_resource(dev, PCI_BASE_ADDRESS_4); diff --git a/src/southbridge/intel/ibexpeak/smbus.c b/src/southbridge/intel/ibexpeak/smbus.c index 352b5898a676..12734a0ce6cb 100644 --- a/src/southbridge/intel/ibexpeak/smbus.c +++ b/src/southbridge/intel/ibexpeak/smbus.c @@ -14,12 +14,9 @@ static void pch_smbus_init(struct device *dev) { struct resource *res; - u16 reg16; /* Enable clock gating */ - reg16 = pci_read_config32(dev, 0x80); - reg16 &= ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)); - pci_write_config32(dev, 0x80, reg16); + pci_and_config16(dev, 0x80, ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14))); /* Set Receive Slave Address */ res = find_resource(dev, PCI_BASE_ADDRESS_4); diff --git a/src/southbridge/intel/lynxpoint/smbus.c b/src/southbridge/intel/lynxpoint/smbus.c index 32c9c14e40c2..d55aa6e3d085 100644 --- a/src/southbridge/intel/lynxpoint/smbus.c +++ b/src/southbridge/intel/lynxpoint/smbus.c @@ -13,13 +13,9 @@ static void pch_smbus_init(struct device *dev) { struct resource *res; - u16 reg16; /* Enable clock gating */ - /* FIXME: Using 32-bit ops with a 16-bit variable is a bug! These should be 16-bit! */ - reg16 = pci_read_config32(dev, 0x80); - reg16 &= ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)); - pci_write_config32(dev, 0x80, reg16); + pci_and_config16(dev, 0x80, ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14))); /* Set Receive Slave Address */ res = find_resource(dev, PCI_BASE_ADDRESS_4); |