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| author | Duncan Laurie <dlaurie@chromium.org> | 2016-12-08 10:48:06 -0800 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2016-12-08 22:23:38 +0100 |
| commit | 57dcf55538e192b65f568eb7452043634fc49fce (patch) | |
| tree | 532934edfd0b57569828b75f97c558fb3be55923 | |
| parent | a697c19640527b67c4a25150ad8d01340d434a69 (diff) | |
| download | coreboot-57dcf55538e192b65f568eb7452043634fc49fce.tar.gz coreboot-57dcf55538e192b65f568eb7452043634fc49fce.tar.bz2 coreboot-57dcf55538e192b65f568eb7452043634fc49fce.zip | |
google/eve: Add ASL code to describe SPI FPC1020 controller
There is ongoing work to link SPI bus and devices in to the devicetree
so this can be generated, but for now put in the raw ASL code to
describe this controller so it can be used by the factory.
BUG=chrome-os-partner:55538
TEST=successfully load fpc1020 kernel module on eve board
Change-Id: I6641664e60fcf2c0bad4b3506c77513b26d7be2e
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/17776
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | src/mainboard/google/eve/acpi/mainboard.asl | 49 | ||||
| -rw-r--r-- | src/mainboard/google/eve/dsdt.asl | 3 |
2 files changed, 52 insertions, 0 deletions
diff --git a/src/mainboard/google/eve/acpi/mainboard.asl b/src/mainboard/google/eve/acpi/mainboard.asl new file mode 100644 index 000000000000..a55308ff3152 --- /dev/null +++ b/src/mainboard/google/eve/acpi/mainboard.asl @@ -0,0 +1,49 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +Scope (\_SB.PCI0.SPI1) +{ + Device (FPC) + { + Name (_HID, "PRP0001") + Name (_UID, 1) + Name (_CRS, ResourceTemplate () + { + SpiSerialBus ( + 0, // DeviceSelection (CS0) + PolarityLow, // DeviceSelectionPolarity + FourWireMode, // WireMode + 8, // DataBitLength + ControllerInitiated, // SlaveMode + 1000000, // ConnectionSpeed (1MHz) + ClockPolarityLow, // ClockPolarity + ClockPhaseFirst, // ClockPhase + "\\_SB.PCI0.SPI1", // ResourceSource + 0, // ResourceSourceIndex + ResourceConsumer, // ResourceUsage + ) + Interrupt (ResourceConsumer, Edge, ActiveLow) { 0x50 } + }) + Name (_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () { + "compatible", + Package () { "fpc,fpc1020" } + }, + } + }) + } +} diff --git a/src/mainboard/google/eve/dsdt.asl b/src/mainboard/google/eve/dsdt.asl index 2882d50f1947..22b92f31946a 100644 --- a/src/mainboard/google/eve/dsdt.asl +++ b/src/mainboard/google/eve/dsdt.asl @@ -67,4 +67,7 @@ DefinitionBlock( { #include "acpi/dptf.asl" } + + /* ACPI code for EC functions */ + #include "acpi/mainboard.asl" } |