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authorStephen Edworthy <stephen@starlabs.systems>2022-03-31 09:09:32 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-04-01 22:20:03 +0000
commit66d94ba4c0a9614f9560b337156f60fe9ea7aeeb (patch)
tree3baf041deda16f00e4b4d5d1e0b761faac0f7c60
parenta6fd7105e8bb823a146c95e78d0f8aadc41f93de (diff)
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mb/starlabs/laptop: Enable rtd3 for SSD on TGL
Enabling rtd3 reduces power consumption when the SSD is idle. Tested and verified on the StarBook Mk V (TGL), using PowerTop on Manjaro 21.2.5 GNOME at 20% Brightness. Signed-off-by: Stephen Edworthy <stephen@starlabs.systems> Change-Id: I0d8aa185a322bb8d1aba51ccaab03c521cec2770 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63254 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
-rw-r--r--src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb b/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb
index 66b8e86eb789..626425728db4 100644
--- a/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb
+++ b/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb
@@ -182,6 +182,12 @@ chip soc/intel/tigerlake
register "PcieClkSrcClkReq[3]" = "3"
register "PcieRpSlotImplemented[8]" = "1"
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X"
+ chip soc/intel/common/block/pcie/rtd3
+ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D16)"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)"
+ register "srcclk_pin" = "3"
+ device generic 0 on end
+ end
end
device pci 1d.1 off end # PCI Express Port 10
device pci 1d.2 off end # PCI Express Port 11