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authorjzhao80 <john.zhao@intel.com>2022-01-10 07:54:57 -0800
committerFelix Held <felix-coreboot@felixheld.de>2022-01-12 16:09:47 +0000
commit6c4edff487d365d40fbd6fb0eb3332492a947ada (patch)
tree6febc7ba6aa1a6878343a83f5e270b0dd5d9a771
parenta421b1a289fd173da609a4d1e2625c44ad1faad4 (diff)
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soc/intel/tigerlake: Implement function to map physical port to EC port
Currently coreboot and EC had different logic to interpret TCSS port number which would break retimer update functionality since coreboot would pass wrong port information to EC. This change clones the implementation on Alder Lake which converts the phyiscal port mapping to EC's abstract port mapping. BUG=b:207057940 BRANCH=None Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: If4451598dbb83528ae6d88dbc1b65c206f24fe1f Reviewed-on: https://review.coreboot.org/c/coreboot/+/60972 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
-rw-r--r--src/soc/intel/tigerlake/Makefile.inc1
-rw-r--r--src/soc/intel/tigerlake/retimer.c32
2 files changed, 33 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc
index 25a1d6541002..0b616bee3ce3 100644
--- a/src/soc/intel/tigerlake/Makefile.inc
+++ b/src/soc/intel/tigerlake/Makefile.inc
@@ -37,6 +37,7 @@ ramstage-y += p2sb.c
ramstage-y += pcie_rp.c
ramstage-y += pmc.c
ramstage-y += reset.c
+ramstage-y += retimer.c
ramstage-y += soundwire.c
ramstage-y += systemagent.c
ramstage-y += xhci.c
diff --git a/src/soc/intel/tigerlake/retimer.c b/src/soc/intel/tigerlake/retimer.c
new file mode 100644
index 000000000000..09bf112160a4
--- /dev/null
+++ b/src/soc/intel/tigerlake/retimer.c
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <drivers/intel/usb4/retimer/retimer.h>
+#include <intelblocks/tcss.h>
+
+int retimer_get_index_for_typec(uint8_t typec_port)
+{
+ int ec_port = 0;
+
+ const struct device *tcss_port_arr[] = {
+ DEV_PTR(tcss_usb3_port1),
+ DEV_PTR(tcss_usb3_port2),
+ DEV_PTR(tcss_usb3_port3),
+ DEV_PTR(tcss_usb3_port4),
+ };
+
+ for (uint8_t i = 0; i < MAX_TYPE_C_PORTS; i++) {
+ if (i == typec_port) {
+ printk(BIOS_ERR, "USB Type-C %d mapped to EC port %d\n", typec_port,
+ ec_port);
+ return ec_port;
+ }
+
+ if (is_dev_enabled(tcss_port_arr[i]))
+ ec_port++;
+ }
+
+ // Code should not come here if typec_port input is correct
+ return -1;
+}