mainboard/intel/kblrvp: Add support to read board ID from EC

Add a function to identify an Intel RVP board by querying EC

Change-Id: I21337000827639fb8f22c5ee9bc5d86f1ebe1e74
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/17283
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

4 files changed, 73 insertions, 0 deletions

diff --git a/src/mainboard/intel/kblrvp/Kconfig b/src/mainboard/intel/kblrvp/Kconfig
index 7df726c331d6..7e27d89d70ec 100644
--- a/src/mainboard/intel/kblrvp/Kconfig
+++ b/src/mainboard/intel/kblrvp/Kconfig
@@ -3,6 +3,7 @@ if BOARD_INTEL_KBLRVP3
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select BOARD_ROMSIZE_KB_16384
+	select EC_ACPI
 	select HAVE_ACPI_RESUME
 	select HAVE_ACPI_TABLES
 	select HAVE_OPTION_TABLE
diff --git a/src/mainboard/intel/kblrvp/Makefile.inc b/src/mainboard/intel/kblrvp/Makefile.inc
index de1da23cb794..68c87c9ca69b 100644
--- a/src/mainboard/intel/kblrvp/Makefile.inc
+++ b/src/mainboard/intel/kblrvp/Makefile.inc
@@ -20,7 +20,11 @@ bootblock-y += bootblock.c
 
 bootblock-$(CONFIG_CHROMEOS) += chromeos.c
 verstage-$(CONFIG_CHROMEOS) += chromeos.c
+
+romstage-y += board_id.c
 romstage-$(CONFIG_CHROMEOS) += chromeos.c
+
+ramstage-y += board_id.c
 ramstage-$(CONFIG_CHROMEOS) += chromeos.c
 
 ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC) += ec.c
diff --git a/src/mainboard/intel/kblrvp/board_id.c b/src/mainboard/intel/kblrvp/board_id.c
new file mode 100644
index 000000000000..a362b08df869
--- /dev/null
+++ b/src/mainboard/intel/kblrvp/board_id.c
@@ -0,0 +1,32 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include "board_id.h"
+#include <ec/acpi/ec.h>
+#include <stdint.h>
+
+/*
+ * Get Board ID via EC I/O port write/read
+ */
+int get_board_id(void)
+{
+	uint8_t buffer[2];
+	uint8_t index;
+	if (send_ec_command(EC_FAB_ID_CMD) == 0) {
+		for (index = 0; index < sizeof(buffer); index++)
+			buffer[index] = recv_ec_data();
+		return (buffer[1] << 8) | buffer[0];
+	}
+	return -1;
+}
diff --git a/src/mainboard/intel/kblrvp/board_id.h b/src/mainboard/intel/kblrvp/board_id.h
new file mode 100644
index 000000000000..881866fdbe41
--- /dev/null
+++ b/src/mainboard/intel/kblrvp/board_id.h
@@ -0,0 +1,36 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _MAINBOARD_BOARD_ID_H_
+#define _MAINBOARD_BOARD_ID_H_
+
+/* Mobile Board Id 0x00 - 0xFF */
+#define BOARD_ID_SKL_A0_RVP3	0x04
+#define BOARD_ID_SKL_RVP7	0x0B
+
+/* 60-6F reserved for KBL RVPs */
+#define BOARD_ID_KBL_LPDDR3_RVP3	0x60
+#define BOARD_ID_KBL_LPDDR3_RVP7	0x64
+
+/* Board/FAB ID Command */
+#define EC_FAB_ID_CMD	0x0D
+
+/*
+ * Returns board information (board id[15:8] and
+ * Fab info[7:0]) on success and < 0 on error
+ */
+int get_board_id(void);
+
+#endif /* _MAINBOARD_BOARD_ID_H_ */