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| author | Edward O'Callaghan <quasisec@google.com> | 2020-07-01 18:44:48 +1000 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2020-07-03 00:03:09 +0000 |
| commit | 78a8c85a47416991f71f21dba38d64d29b90f4f6 (patch) | |
| tree | c72500163bce0d2df74810cc67f3f16a4a5ba5d4 | |
| parent | d0089c2b075121af401c428740962a7432759691 (diff) | |
| download | coreboot-78a8c85a47416991f71f21dba38d64d29b90f4f6.tar.gz coreboot-78a8c85a47416991f71f21dba38d64d29b90f4f6.tar.bz2 coreboot-78a8c85a47416991f71f21dba38d64d29b90f4f6.zip | |
mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Duffy
BUG=b:160296325
BRANCH=none
TEST=none
Change-Id: Iffa6997029d0babfd6dd504a6cc212bd74de3a8f
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42972
Reviewed-by: Sam McNally <sammc@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/google/hatch/variants/duffy/overridetree.cb | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/duffy/overridetree.cb b/src/mainboard/google/hatch/variants/duffy/overridetree.cb index 55ce5ea08427..244e67840b0c 100644 --- a/src/mainboard/google/hatch/variants/duffy/overridetree.cb +++ b/src/mainboard/google/hatch/variants/duffy/overridetree.cb @@ -81,6 +81,18 @@ chip soc/intel/cannonlake register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 0 register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port 4 + # Bitmap for Wake Enable on USB attach/detach + register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(2) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(5) | \ + USB_PORT_WAKE_ENABLE(6)" + register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(2) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(5) | \ + USB_PORT_WAKE_ENABLE(6)" + # Enable eMMC HS400 register "ScsEmmcHs400Enabled" = "1" |