diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2023-05-19 12:20:15 +0200 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-06-04 19:22:50 +0000 |
| commit | 81decdf2ee18c5e9d327e3fc77cbcf0385800195 (patch) | |
| tree | eb3c47231cd35b9aa527dfa0e4bcbfbdb82763df | |
| parent | 1efca4d570b9f9b684a6fc0d7bcdead8b0fcf1cf (diff) | |
| download | coreboot-81decdf2ee18c5e9d327e3fc77cbcf0385800195.tar.gz coreboot-81decdf2ee18c5e9d327e3fc77cbcf0385800195.tar.bz2 coreboot-81decdf2ee18c5e9d327e3fc77cbcf0385800195.zip | |
soc/sifive: Comment out set but unused variables
The code is supposed to output debug messages but is commented out, so
do the same for variables.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: Ief1f9d2175fe1375fe6ac4bb0765b00513321fa6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75356
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
| -rw-r--r-- | src/soc/sifive/fu540/ux00ddr.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/sifive/fu540/ux00ddr.h b/src/soc/sifive/fu540/ux00ddr.h index bf856f362187..d468a8ede7be 100644 --- a/src/soc/sifive/fu540/ux00ddr.h +++ b/src/soc/sifive/fu540/ux00ddr.h @@ -148,9 +148,9 @@ static inline uint64_t ux00ddr_phy_fixup(size_t ahbregaddr) { size_t ddrphyreg = ahbregaddr + 0x2000; - uint64_t fails=0; + // uint64_t fails=0; uint32_t slicebase = 0; - uint32_t dq = 0; + // uint32_t dq = 0; // check errata condition for (uint32_t slice = 0; slice < 8; slice++) { @@ -175,7 +175,7 @@ static inline uint64_t ux00ddr_phy_fixup(size_t ahbregaddr) { // print error message on failure if (failc0 || failc1) { //if (fails==0) uart_puts((void*) UART0_CTRL_ADDR, "DDR error in fixing up \n"); - fails |= (1<<dq); + //fails |= (1<<dq); /* char slicelsc = '0'; */ /* char slicemsc = '0'; */ /* slicelsc += (dq % 10); */ @@ -187,7 +187,7 @@ static inline uint64_t ux00ddr_phy_fixup(size_t ahbregaddr) { //else uart_puts((void*) UART0_CTRL_ADDR, "D"); //uart_puts((void*) UART0_CTRL_ADDR, "\n"); } - dq++; + //dq++; } } slicebase+=128; |