diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-05-28 17:29:45 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-14 16:11:10 +0000 |
| commit | 854782330ccd3f92d1b09bd006ddf127ba188cba (patch) | |
| tree | 13a9e1fac65940b46883e1e9f2b77ad8fce54531 | |
| parent | 5320f5387ef5cc4e54ef0e5e672b253e9d447592 (diff) | |
| download | coreboot-854782330ccd3f92d1b09bd006ddf127ba188cba.tar.gz coreboot-854782330ccd3f92d1b09bd006ddf127ba188cba.tar.bz2 coreboot-854782330ccd3f92d1b09bd006ddf127ba188cba.zip | |
src: Remove unused 'include <stdint.h>
Found using:
diff <(git grep -l '#include <stdint.h>' -- src/) <(git grep -l 'int8_t\|int16_t\|int32_t\|int64_t\|intptr_t\|intmax_t\|s8\|u8\|s16\|u16\|s32\|u32\|s64\|u64\|INT8_MIN\|INT8_MAX\|INT16_MIN\|INT16_MAX\|INT32_MIN\|INT32_MAX\|INT64_MIN\|INT64_MAX\|INTMAX_MIN\|INTMAX_MAX' -- src/) |grep -v vendorcode |grep '<'
Change-Id: I5e14bf4887c7d2644a64f4d58c6d8763eb74d2ed
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41827
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
50 files changed, 0 insertions, 53 deletions
diff --git a/src/arch/arm/include/armv4/arch/cache.h b/src/arch/arm/include/armv4/arch/cache.h index 8807bebe0bbc..8aa619dcc590 100644 --- a/src/arch/arm/include/armv4/arch/cache.h +++ b/src/arch/arm/include/armv4/arch/cache.h @@ -7,7 +7,6 @@ #define ARM_CACHE_H #include <stddef.h> -#include <stdint.h> /* * Cache maintenance API diff --git a/src/arch/arm64/include/armv8/arch/cache.h b/src/arch/arm64/include/armv8/arch/cache.h index a78d03c610e6..bb9d6febec5b 100644 --- a/src/arch/arm64/include/armv8/arch/cache.h +++ b/src/arch/arm64/include/armv8/arch/cache.h @@ -11,7 +11,6 @@ #ifndef __ASSEMBLER__ #include <stddef.h> -#include <stdint.h> #include <arch/barrier.h> /* dcache clean by virtual address to PoC */ diff --git a/src/arch/x86/include/arch/ebda.h b/src/arch/x86/include/arch/ebda.h index 71426b13ef28..e625d4a30588 100644 --- a/src/arch/x86/include/arch/ebda.h +++ b/src/arch/x86/include/arch/ebda.h @@ -3,7 +3,6 @@ #ifndef __ARCH_EBDA_H #define __ARCH_EBDA_H -#include <stdint.h> #include <stddef.h> #define X86_BDA_SIZE 0x200 diff --git a/src/commonlib/include/commonlib/region.h b/src/commonlib/include/commonlib/region.h index c7c339f80605..b9a984f17198 100644 --- a/src/commonlib/include/commonlib/region.h +++ b/src/commonlib/include/commonlib/region.h @@ -4,7 +4,6 @@ #define _REGION_H_ #include <sys/types.h> -#include <stdint.h> #include <stddef.h> #include <stdbool.h> #include <commonlib/mem_pool.h> diff --git a/src/drivers/i2c/rt1011/chip.h b/src/drivers/i2c/rt1011/chip.h index 9d1a1214d24c..e5dee97159ad 100644 --- a/src/drivers/i2c/rt1011/chip.h +++ b/src/drivers/i2c/rt1011/chip.h @@ -4,7 +4,6 @@ * Realtek RT1011 audio codec devicetree bindings */ -#include <stdint.h> struct drivers_i2c_rt1011_config { const char *name; /* ACPI Device Name */ diff --git a/src/drivers/intel/fsp1_1/include/fsp/car.h b/src/drivers/intel/fsp1_1/include/fsp/car.h index db203aeb362a..ceb87d860f9c 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/car.h +++ b/src/drivers/intel/fsp1_1/include/fsp/car.h @@ -4,7 +4,6 @@ #define FSP1_1_CAR_H #include <fsp/api.h> -#include <stdint.h> /* Per stage calls from the above two functions. The void * return from * cache_as_ram_stage_main() is the stack pointer to use in RAM after diff --git a/src/drivers/intel/ptt/ptt.h b/src/drivers/intel/ptt/ptt.h index 7bc878d71df6..b447d585a7a5 100644 --- a/src/drivers/intel/ptt/ptt.h +++ b/src/drivers/intel/ptt/ptt.h @@ -8,7 +8,6 @@ * is still in the preboot phase. * */ -#include <stdint.h> /* * ptt_active * diff --git a/src/drivers/intel/soundwire/soundwire.c b/src/drivers/intel/soundwire/soundwire.c index ab09ff447336..34ecd8602193 100644 --- a/src/drivers/intel/soundwire/soundwire.c +++ b/src/drivers/intel/soundwire/soundwire.c @@ -8,7 +8,6 @@ #include <device/path.h> #include <device/soundwire.h> #include <stdbool.h> -#include <stdint.h> #include "soundwire.h" #include "chip.h" diff --git a/src/mainboard/google/slippy/variants/falco/romstage.c b/src/mainboard/google/slippy/variants/falco/romstage.c index e4af352e6154..eba4a8b64819 100644 --- a/src/mainboard/google/slippy/variants/falco/romstage.c +++ b/src/mainboard/google/slippy/variants/falco/romstage.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <stddef.h> -#include <stdint.h> #include <string.h> #include <cbfs.h> #include <console/console.h> diff --git a/src/mainboard/google/slippy/variants/leon/romstage.c b/src/mainboard/google/slippy/variants/leon/romstage.c index 7a13b90ff5de..2b1b5ca6bdd1 100644 --- a/src/mainboard/google/slippy/variants/leon/romstage.c +++ b/src/mainboard/google/slippy/variants/leon/romstage.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <string.h> #include <cbfs.h> #include <console/console.h> diff --git a/src/mainboard/google/slippy/variants/wolf/romstage.c b/src/mainboard/google/slippy/variants/wolf/romstage.c index 4e02f734ae81..405e86acef99 100644 --- a/src/mainboard/google/slippy/variants/wolf/romstage.c +++ b/src/mainboard/google/slippy/variants/wolf/romstage.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <string.h> #include <cbfs.h> #include <console/console.h> diff --git a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/include/baseboard/variants.h index af9ba079ce97..f77d38bfb304 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/include/baseboard/variants.h @@ -4,7 +4,6 @@ #define __BASEBOARD_VARIANTS_H__ #include <soc/gpio.h> -#include <stdint.h> #include <vendorcode/google/chromeos/chromeos.h> /* The next set of functions return the gpio table and fill in the number of diff --git a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h index 48abbfeba648..b7a1616e4638 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h @@ -5,7 +5,6 @@ #include <soc/cnl_memcfg_init.h> #include <soc/gpio.h> -#include <stdint.h> #include <vendorcode/google/chromeos/chromeos.h> /* The next set of functions return the gpio table and fill in the number of diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h index 178064f56616..f1df93783d8d 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h @@ -5,7 +5,6 @@ #include <soc/gpio.h> #include <soc/meminit.h> -#include <stdint.h> #include <vendorcode/google/chromeos/chromeos.h> /** diff --git a/src/mainboard/intel/icelake_rvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/icelake_rvp/variants/baseboard/include/baseboard/variants.h index 16a4cbc8dc6b..ccbadca56c31 100644 --- a/src/mainboard/intel/icelake_rvp/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/intel/icelake_rvp/variants/baseboard/include/baseboard/variants.h @@ -4,7 +4,6 @@ #define __BASEBOARD_VARIANTS_H__ #include <soc/gpio.h> -#include <stdint.h> #include <vendorcode/google/chromeos/chromeos.h> /* The next set of functions return the gpio table and fill in the number of diff --git a/src/mainboard/intel/jasperlake_rvp/board_id.h b/src/mainboard/intel/jasperlake_rvp/board_id.h index 20483c8edf74..55b4f52d533c 100644 --- a/src/mainboard/intel/jasperlake_rvp/board_id.h +++ b/src/mainboard/intel/jasperlake_rvp/board_id.h @@ -3,7 +3,6 @@ #ifndef _MAINBOARD_COMMON_BOARD_ID_H_ #define _MAINBOARD_COMMON_BOARD_ID_H_ -#include <stdint.h> /* Board/FAB ID Command */ #define EC_FAB_ID_CMD 0x0D diff --git a/src/mainboard/intel/tglrvp/board_id.h b/src/mainboard/intel/tglrvp/board_id.h index b87f99aaca23..c8d6cd2c0734 100644 --- a/src/mainboard/intel/tglrvp/board_id.h +++ b/src/mainboard/intel/tglrvp/board_id.h @@ -3,7 +3,6 @@ #ifndef _MAINBOARD_COMMON_BOARD_ID_H_ #define _MAINBOARD_COMMON_BOARD_ID_H_ -#include <stdint.h> /* Board/FAB ID Command */ #define EC_FAB_ID_CMD 0x0D diff --git a/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h index 0da97cdb6816..bad9e9e8280f 100644 --- a/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h @@ -5,7 +5,6 @@ #include <soc/gpio.h> #include <soc/meminit.h> -#include <stdint.h> #include <vendorcode/google/chromeos/chromeos.h> /* The next set of functions return the gpio table and fill in the number of diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c index b9841b5408b7..5c0dd5c1a7db 100644 --- a/src/northbridge/intel/sandybridge/romstage.c +++ b/src/northbridge/intel/sandybridge/romstage.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <console/console.h> #include <cf9_reset.h> #include <device/pci_ops.h> diff --git a/src/security/memory/memory.h b/src/security/memory/memory.h index fea341e92ff7..442ace1189bf 100644 --- a/src/security/memory/memory.h +++ b/src/security/memory/memory.h @@ -1,5 +1,4 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> bool security_clear_dram_request(void); diff --git a/src/security/vboot/vboot_common.h b/src/security/vboot/vboot_common.h index 66e96e4782e0..f2cff659ba41 100644 --- a/src/security/vboot/vboot_common.h +++ b/src/security/vboot/vboot_common.h @@ -3,7 +3,6 @@ #define __VBOOT_VBOOT_COMMON_H__ #include <commonlib/region.h> -#include <stdint.h> #include <vb2_api.h> /* diff --git a/src/soc/amd/common/block/include/amdblocks/agesawrapper.h b/src/soc/amd/common/block/include/amdblocks/agesawrapper.h index 348798ede611..8883893e528c 100644 --- a/src/soc/amd/common/block/include/amdblocks/agesawrapper.h +++ b/src/soc/amd/common/block/include/amdblocks/agesawrapper.h @@ -3,7 +3,6 @@ #ifndef __AGESAWRAPPER_H__ #define __AGESAWRAPPER_H__ -#include <stdint.h> #include <agesa_headers.h> enum { diff --git a/src/soc/amd/common/block/include/amdblocks/s3_resume.h b/src/soc/amd/common/block/include/amdblocks/s3_resume.h index 39895088f8ad..305ed0480666 100644 --- a/src/soc/amd/common/block/include/amdblocks/s3_resume.h +++ b/src/soc/amd/common/block/include/amdblocks/s3_resume.h @@ -3,7 +3,6 @@ #ifndef __AMD_S3_RESUME_H__ #define __AMD_S3_RESUME_H__ -#include <stdint.h> #include <agesa_headers.h> AGESA_STATUS OemInitResume(S3_DATA_BLOCK *dataBlock); diff --git a/src/soc/amd/picasso/psp_verstage/printk.c b/src/soc/amd/picasso/psp_verstage/printk.c index 2252d4426295..2f9d30a29efa 100644 --- a/src/soc/amd/picasso/psp_verstage/printk.c +++ b/src/soc/amd/picasso/psp_verstage/printk.c @@ -4,7 +4,6 @@ #include <console/console.h> #include <console/streams.h> #include <stdarg.h> -#include <stdint.h> void console_hw_init(void) { diff --git a/src/soc/amd/picasso/psp_verstage/reset.c b/src/soc/amd/picasso/psp_verstage/reset.c index 5619e457aea6..7cd790795ed8 100644 --- a/src/soc/amd/picasso/psp_verstage/reset.c +++ b/src/soc/amd/picasso/psp_verstage/reset.c @@ -3,8 +3,6 @@ #include <bl_uapp/bl_syscall_public.h> #include <console/console.h> #include <reset.h> -#include <stdint.h> - void do_board_reset(void) { diff --git a/src/soc/intel/baytrail/include/soc/romstage.h b/src/soc/intel/baytrail/include/soc/romstage.h index a7b7fce92cf2..156fc31b8070 100644 --- a/src/soc/intel/baytrail/include/soc/romstage.h +++ b/src/soc/intel/baytrail/include/soc/romstage.h @@ -3,7 +3,6 @@ #ifndef _BAYTRAIL_ROMSTAGE_H_ #define _BAYTRAIL_ROMSTAGE_H_ -#include <stdint.h> #include <soc/mrc_wrapper.h> void mainboard_fill_mrc_params(struct mrc_params *mp); diff --git a/src/soc/intel/braswell/include/soc/romstage.h b/src/soc/intel/braswell/include/soc/romstage.h index de890fd33435..2cf9afa6334b 100644 --- a/src/soc/intel/braswell/include/soc/romstage.h +++ b/src/soc/intel/braswell/include/soc/romstage.h @@ -3,7 +3,6 @@ #ifndef _SOC_ROMSTAGE_H_ #define _SOC_ROMSTAGE_H_ -#include <stdint.h> #include <fsp/romstage.h> #include <fsp/util.h> #include <soc/pm.h> diff --git a/src/soc/intel/broadwell/include/soc/romstage.h b/src/soc/intel/broadwell/include/soc/romstage.h index 2c7b0a46cc1f..f45419c10b47 100644 --- a/src/soc/intel/broadwell/include/soc/romstage.h +++ b/src/soc/intel/broadwell/include/soc/romstage.h @@ -3,7 +3,6 @@ #ifndef _BROADWELL_ROMSTAGE_H_ #define _BROADWELL_ROMSTAGE_H_ -#include <stdint.h> #include <soc/pei_data.h> struct chipset_power_state; diff --git a/src/soc/intel/cannonlake/include/soc/pch.h b/src/soc/intel/cannonlake/include/soc/pch.h index 754eabbb3f4d..778b26981b48 100644 --- a/src/soc/intel/cannonlake/include/soc/pch.h +++ b/src/soc/intel/cannonlake/include/soc/pch.h @@ -3,7 +3,6 @@ #ifndef _SOC_CANNONLAKE_PCH_H_ #define _SOC_CANNONLAKE_PCH_H_ -#include <stdint.h> #define PCH_H 1 #define PCH_LP 2 diff --git a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h index c75e05584a2d..5f5aab52f402 100644 --- a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h +++ b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h @@ -3,7 +3,6 @@ #ifndef SOC_INTEL_COMMON_BLOCK_PCIE_RP_H #define SOC_INTEL_COMMON_BLOCK_PCIE_RP_H -#include <stdint.h> /* * The PCIe Root Ports usually come in groups of up to 8 PCI-device diff --git a/src/soc/intel/common/block/smbus/smbuslib.h b/src/soc/intel/common/block/smbus/smbuslib.h index 2d8774c6893b..05cecf351b24 100644 --- a/src/soc/intel/common/block/smbus/smbuslib.h +++ b/src/soc/intel/common/block/smbus/smbuslib.h @@ -3,7 +3,6 @@ #ifndef SOC_INTEL_COMMON_BLOCK_SMBUS__LIB_H #define SOC_INTEL_COMMON_BLOCK_SMBUS__LIB_H -#include <stdint.h> /* SMBus IO Base Address */ #define SMBUS_IO_BASE 0xefa0 diff --git a/src/soc/intel/common/mma.h b/src/soc/intel/common/mma.h index 2e0121088a47..e58edaf518e9 100644 --- a/src/soc/intel/common/mma.h +++ b/src/soc/intel/common/mma.h @@ -3,7 +3,6 @@ #ifndef _SOC_MMA_H_ #define _SOC_MMA_H_ -#include <stdint.h> #include <commonlib/region.h> struct mma_config_param { diff --git a/src/soc/intel/common/pch/include/intelpch/lockdown.h b/src/soc/intel/common/pch/include/intelpch/lockdown.h index 72deebdcd58a..17b8cbc0e9e2 100644 --- a/src/soc/intel/common/pch/include/intelpch/lockdown.h +++ b/src/soc/intel/common/pch/include/intelpch/lockdown.h @@ -3,7 +3,6 @@ #ifndef SOC_INTEL_COMMON_PCH_LOCKDOWN_H #define SOC_INTEL_COMMON_PCH_LOCKDOWN_H -#include <stdint.h> /* * This function will get lockdown config specific to soc. diff --git a/src/soc/intel/icelake/include/soc/pch.h b/src/soc/intel/icelake/include/soc/pch.h index c66808be5497..cbba2b43ef6a 100644 --- a/src/soc/intel/icelake/include/soc/pch.h +++ b/src/soc/intel/icelake/include/soc/pch.h @@ -3,7 +3,6 @@ #ifndef _SOC_ICELAKE_PCH_H_ #define _SOC_ICELAKE_PCH_H_ -#include <stdint.h> #define PCH_H 1 #define PCH_LP 2 diff --git a/src/soc/intel/jasperlake/include/soc/espi.h b/src/soc/intel/jasperlake/include/soc/espi.h index 77975340ebb9..5c99adba3854 100644 --- a/src/soc/intel/jasperlake/include/soc/espi.h +++ b/src/soc/intel/jasperlake/include/soc/espi.h @@ -3,7 +3,6 @@ #ifndef _SOC_JASPERLAKE_ESPI_H_ #define _SOC_JASPERLAKE_ESPI_H_ -#include <stdint.h> /* PCI Configuration Space (D31:F0): ESPI */ #define SCI_IRQ_SEL (7 << 0) diff --git a/src/soc/intel/jasperlake/include/soc/pch.h b/src/soc/intel/jasperlake/include/soc/pch.h index 1a6396d377df..db62c8649ac9 100644 --- a/src/soc/intel/jasperlake/include/soc/pch.h +++ b/src/soc/intel/jasperlake/include/soc/pch.h @@ -3,7 +3,6 @@ #ifndef _SOC_JASPERLAKE_PCH_H_ #define _SOC_JASPERLAKE_PCH_H_ -#include <stdint.h> #define PCIE_CLK_NOTUSED 0xFF #define PCIE_CLK_LAN 0x70 diff --git a/src/soc/intel/jasperlake/me.c b/src/soc/intel/jasperlake/me.c index e4dc93feb4c7..b40b4dc2e5c3 100644 --- a/src/soc/intel/jasperlake/me.c +++ b/src/soc/intel/jasperlake/me.c @@ -4,7 +4,6 @@ #include <intelblocks/cse.h> #include <console/console.h> #include <soc/me.h> -#include <stdint.h> static void dump_me_status(void *unused) { diff --git a/src/soc/intel/tigerlake/include/soc/espi.h b/src/soc/intel/tigerlake/include/soc/espi.h index 449eb6307438..6a86147018e1 100644 --- a/src/soc/intel/tigerlake/include/soc/espi.h +++ b/src/soc/intel/tigerlake/include/soc/espi.h @@ -9,7 +9,6 @@ #ifndef _SOC_TIGERLAKE_ESPI_H_ #define _SOC_TIGERLAKE_ESPI_H_ -#include <stdint.h> /* PCI Configuration Space (D31:F0): ESPI */ #define SCI_IRQ_SEL (7 << 0) diff --git a/src/soc/intel/tigerlake/include/soc/pch.h b/src/soc/intel/tigerlake/include/soc/pch.h index 457b616dd060..ad0186adc48a 100644 --- a/src/soc/intel/tigerlake/include/soc/pch.h +++ b/src/soc/intel/tigerlake/include/soc/pch.h @@ -3,7 +3,6 @@ #ifndef _SOC_TIGERLAKE_PCH_H_ #define _SOC_TIGERLAKE_PCH_H_ -#include <stdint.h> #define PCIE_CLK_NOTUSED 0xFF #define PCIE_CLK_LAN 0x70 diff --git a/src/soc/mediatek/mt8173/include/soc/addressmap.h b/src/soc/mediatek/mt8173/include/soc/addressmap.h index 4b2e15013fe0..772f6f22b1b3 100644 --- a/src/soc/mediatek/mt8173/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8173/include/soc/addressmap.h @@ -4,7 +4,6 @@ #define __SOC_MEDIATEK_MT8173_INCLUDE_SOC_ADDRESS_MAP_H__ #include <stddef.h> -#include <stdint.h> enum { VER_BASE = 0x08000000, diff --git a/src/soc/nvidia/tegra/usb.h b/src/soc/nvidia/tegra/usb.h index 2a14fef6969b..387fb676ea8d 100644 --- a/src/soc/nvidia/tegra/usb.h +++ b/src/soc/nvidia/tegra/usb.h @@ -3,7 +3,6 @@ #ifndef __SOC_NVIDIA_TEGRA_USB_H__ #define __SOC_NVIDIA_TEGRA_USB_H__ -#include <stdint.h> enum usb_phy_type { /* For use in lpm_ctrl[31:29] */ USB_PHY_UTMIP = 0, diff --git a/src/soc/nvidia/tegra124/include/soc/gpio.h b/src/soc/nvidia/tegra124/include/soc/gpio.h index 10612c46743a..6b66a983195a 100644 --- a/src/soc/nvidia/tegra124/include/soc/gpio.h +++ b/src/soc/nvidia/tegra124/include/soc/gpio.h @@ -5,7 +5,6 @@ #include <soc/nvidia/tegra/gpio.h> #include <soc/pinmux.h> /* for pinmux constants in GPIO macro */ -#include <stdint.h> /* GPIO index constants. */ diff --git a/src/soc/nvidia/tegra124/include/soc/pingroup.h b/src/soc/nvidia/tegra124/include/soc/pingroup.h index d9a94a865abe..7b1fb16b576c 100644 --- a/src/soc/nvidia/tegra124/include/soc/pingroup.h +++ b/src/soc/nvidia/tegra124/include/soc/pingroup.h @@ -4,7 +4,6 @@ #define __SOC_NVIDIA_TEGRA124_PINGROUP_H__ #include <soc/nvidia/tegra/pingroup.h> -#include <stdint.h> enum { PINGROUP_AO1_INDEX = 0, /* offset 0x868 */ diff --git a/src/soc/nvidia/tegra124/include/soc/pinmux.h b/src/soc/nvidia/tegra124/include/soc/pinmux.h index f5f01ef0e8cb..e0dfc9dcf25a 100644 --- a/src/soc/nvidia/tegra124/include/soc/pinmux.h +++ b/src/soc/nvidia/tegra124/include/soc/pinmux.h @@ -4,7 +4,6 @@ #define __SOC_NVIDIA_TEGRA124_PINMUX_H__ #include <soc/nvidia/tegra/pinmux.h> -#include <stdint.h> enum { PINMUX_FUNC_MASK = 3 << 0, diff --git a/src/soc/nvidia/tegra210/include/soc/ccplex.h b/src/soc/nvidia/tegra210/include/soc/ccplex.h index 2fb30875e78a..3975f4444513 100644 --- a/src/soc/nvidia/tegra210/include/soc/ccplex.h +++ b/src/soc/nvidia/tegra210/include/soc/ccplex.h @@ -3,7 +3,6 @@ #ifndef __SOC_NVIDIA_TEGRA210_CCPLEX_H__ #define __SOC_NVIDIA_TEGRA210_CCPLEX_H__ -#include <stdint.h> #define MTS_LOAD_ADDRESS 0x82000000 diff --git a/src/soc/nvidia/tegra210/include/soc/pinmux.h b/src/soc/nvidia/tegra210/include/soc/pinmux.h index 4c8c4be327b9..195aeeb0c23f 100644 --- a/src/soc/nvidia/tegra210/include/soc/pinmux.h +++ b/src/soc/nvidia/tegra210/include/soc/pinmux.h @@ -3,7 +3,6 @@ #ifndef __SOC_NVIDIA_TEGRA210_PINMUX_H__ #define __SOC_NVIDIA_TEGRA210_PINMUX_H__ -#include <stdint.h> #include <soc/nvidia/tegra/gpio.h> #include <soc/nvidia/tegra/pinmux.h> diff --git a/src/soc/qualcomm/qcs405/include/soc/addressmap.h b/src/soc/qualcomm/qcs405/include/soc/addressmap.h index 8e1700c82d0c..1d46071b21eb 100644 --- a/src/soc/qualcomm/qcs405/include/soc/addressmap.h +++ b/src/soc/qualcomm/qcs405/include/soc/addressmap.h @@ -3,7 +3,6 @@ #ifndef __SOC_QUALCOMM_QCS405_ADDRESS_MAP_H__ #define __SOC_QUALCOMM_QCS405_ADDRESS_MAP_H__ -#include <stdint.h> #define QSPI_BASE 0x88DF000 #define TLMM_EAST_TILE_BASE 0x7B00000 diff --git a/src/soc/qualcomm/sc7180/include/soc/addressmap.h b/src/soc/qualcomm/sc7180/include/soc/addressmap.h index c5b48bf44a12..2b65e99396f4 100644 --- a/src/soc/qualcomm/sc7180/include/soc/addressmap.h +++ b/src/soc/qualcomm/sc7180/include/soc/addressmap.h @@ -3,7 +3,6 @@ #ifndef _SOC_QUALCOMM_SC7180_ADDRESS_MAP_H_ #define _SOC_QUALCOMM_SC7180_ADDRESS_MAP_H_ -#include <stdint.h> #define AOSS_CC_BASE 0x0C2A0000 #define GCC_BASE 0x00100000 diff --git a/src/soc/qualcomm/sdm845/include/soc/addressmap.h b/src/soc/qualcomm/sdm845/include/soc/addressmap.h index bddb551f28f3..ba6bc8cd2955 100644 --- a/src/soc/qualcomm/sdm845/include/soc/addressmap.h +++ b/src/soc/qualcomm/sdm845/include/soc/addressmap.h @@ -3,7 +3,6 @@ #ifndef __SOC_QUALCOMM_SDM845_ADDRESS_MAP_H__ #define __SOC_QUALCOMM_SDM845_ADDRESS_MAP_H__ -#include <stdint.h> #define QSPI_BASE 0x88DF000 #define TLMM_EAST_TILE_BASE 0x03500000 diff --git a/src/southbridge/amd/cimx/sb800/cfg.h b/src/southbridge/amd/cimx/sb800/cfg.h index 3c6cda1654c9..25b2a45cabd9 100644 --- a/src/southbridge/amd/cimx/sb800/cfg.h +++ b/src/southbridge/amd/cimx/sb800/cfg.h @@ -1,11 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ - #ifndef _SB800_CFG_H_ #define _SB800_CFG_H_ -#include <stdint.h> - /** * @brief South Bridge CIMx configuration * |