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authorMichael Niewöhner <foss@mniewoehner.de>2021-09-26 14:09:59 +0200
committerMichael Niewöhner <foss@mniewoehner.de>2021-10-02 21:00:42 +0000
commit880acbe2f4f644f427968badef2c57fb415b9c3a (patch)
tree10ed098b99405db0aef286792b30b80f60b116ca
parentf4d6e9085d59513b2dccf95138415661a1f7a75a (diff)
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soc/intel/common: round PM Timer emulation frequency multiplier
Round the PM Timer emulation frequency multiplier to the closest value to increase precision. Test: compared hexdumps of CML binaries for the expected result: before: 0x262E8B51, after: 0x262E8B52 Change-Id: Iafd645c248fc17943ea4be558ed7d01a301ba809 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57943 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/common/block/cpu/pm_timer_emulation.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/cpu/pm_timer_emulation.c b/src/soc/intel/common/block/cpu/pm_timer_emulation.c
index 8f56da54c5c1..0436e04634fd 100644
--- a/src/soc/intel/common/block/cpu/pm_timer_emulation.c
+++ b/src/soc/intel/common/block/cpu/pm_timer_emulation.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <commonlib/helpers.h>
#include <cpu/x86/msr.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/msr.h>
@@ -18,7 +19,7 @@ void enable_pm_timer_emulation(void)
* (clock * msr[63:32]) >> 32 = target frequency.
* Back solve the multiplier so the 3.579545MHz ACPI timer frequency is used.
*/
- msr.hi = (3579545ULL << 32) / CONFIG_CPU_XTAL_HZ;
+ msr.hi = DIV_ROUND_CLOSEST((3579545ULL << 32), CONFIG_CPU_XTAL_HZ);
/* Set PM1 timer IO port and enable */
msr.lo = (EMULATE_DELAY_VALUE << EMULATE_DELAY_OFFSET_VALUE) |
EMULATE_PM_TMR_EN | (ACPI_BASE_ADDRESS + PM1_TMR);