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| author | Peter Lemenkov <lemenkov@gmail.com> | 2018-10-17 10:20:34 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-07-07 00:15:57 +0000 |
| commit | 8d7d98166e87cd5ac68d038110e9407b1730b1bb (patch) | |
| tree | 0b863d4e87dcff51148722bf98f0aef48c278320 | |
| parent | 490b1d3b945b125627498cb3d695e4a0be699337 (diff) | |
| download | coreboot-8d7d98166e87cd5ac68d038110e9407b1730b1bb.tar.gz coreboot-8d7d98166e87cd5ac68d038110e9407b1730b1bb.tar.bz2 coreboot-8d7d98166e87cd5ac68d038110e9407b1730b1bb.zip | |
mb/lenovo/t60: Align ACPI C-state across the similar boards
We have 3 similar Lenovo mainboards - x60 (oldest), t60, and z61t (most
recent addition). The only one with two consequent 2s as the C-types
is t60:
static acpi_cstate_t cst_entries[] = {
{ 1, 1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } },
{ 2, 1, 500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } },
{ 2, 17, 250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } },
};
It seems that 3 could be a better choice for the last line here.
UNTESTED on a real hardware.
Change-Id: I090e82d5f4ae25c768ff45a01a8dd76ff8a96a90
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29160
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
| -rw-r--r-- | src/mainboard/lenovo/t60/mainboard.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/t60/mainboard.c b/src/mainboard/lenovo/t60/mainboard.c index b78d862d4175..5f599465a144 100644 --- a/src/mainboard/lenovo/t60/mainboard.c +++ b/src/mainboard/lenovo/t60/mainboard.c @@ -31,7 +31,7 @@ static acpi_cstate_t cst_entries[] = { { 1, 1, 1000, { 0x7f, 1, 2, 0, 1, 0 } }, { 2, 1, 500, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV2, 0 } }, - { 2, 17, 250, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 0 } }, + { 3, 17, 250, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 0 } }, }; int get_cst_entries(acpi_cstate_t **entries) |