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| author | Felix Held <felix-coreboot@felixheld.de> | 2022-08-03 22:10:05 +0200 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-08-12 21:52:12 +0000 |
| commit | 8f7f4bf87a238dd046a376804b9e53162092f601 (patch) | |
| tree | 2c31aa38216a8fa376c8203a5435eda08138704f | |
| parent | 6cf0e4a3536750cb1cd9ecec56463731db647fe5 (diff) | |
| download | coreboot-8f7f4bf87a238dd046a376804b9e53162092f601.tar.gz coreboot-8f7f4bf87a238dd046a376804b9e53162092f601.tar.bz2 coreboot-8f7f4bf87a238dd046a376804b9e53162092f601.zip | |
soc/amd/cezanne,common: factor out CPPC code to common AMD SoC code
The Cezanne CPPC ACPI table generation code also applies to Sabrina, so
move it to the common AMD SoC code directory so that it can be used for
Sabrina too.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I5ce082a27429948f8af7f55944a1062ba03155da
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66400
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
| -rw-r--r-- | src/soc/amd/cezanne/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/amd/cezanne/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/cezanne/acpi.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/common/block/acpi/Kconfig | 3 | ||||
| -rw-r--r-- | src/soc/amd/common/block/acpi/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/common/block/acpi/cppc.c (renamed from src/soc/amd/cezanne/cppc.c) | 2 | ||||
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/cppc.h (renamed from src/soc/amd/cezanne/include/soc/cppc.h) | 0 |
7 files changed, 7 insertions, 3 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 91129e921d73..d40c37c75701 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -39,6 +39,7 @@ config SOC_SPECIFIC_OPTIONS select SOC_AMD_COMMON_BLOCK_ACPI select SOC_AMD_COMMON_BLOCK_ACPIMMIO select SOC_AMD_COMMON_BLOCK_ACPI_ALIB + select SOC_AMD_COMMON_BLOCK_ACPI_CPPC select SOC_AMD_COMMON_BLOCK_ACPI_GPIO select SOC_AMD_COMMON_BLOCK_ACPI_IVRS select SOC_AMD_COMMON_BLOCK_AOAC diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index c46c577e8929..8c7876a219b9 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -31,7 +31,6 @@ romstage-y += uart.c ramstage-y += acpi.c ramstage-y += agesa_acpi.c ramstage-y += chip.c -ramstage-y += cppc.c ramstage-y += cpu.c ramstage-y += data_fabric.c ramstage-y += fch.c diff --git a/src/soc/amd/cezanne/acpi.c b/src/soc/amd/cezanne/acpi.c index 47f05b4bb2fb..6ce041b85070 100644 --- a/src/soc/amd/cezanne/acpi.c +++ b/src/soc/amd/cezanne/acpi.c @@ -5,6 +5,7 @@ #include <acpi/acpi.h> #include <acpi/acpigen.h> #include <amdblocks/acpi.h> +#include <amdblocks/cppc.h> #include <amdblocks/cpu.h> #include <amdblocks/acpimmio.h> #include <amdblocks/ioapic.h> @@ -19,7 +20,6 @@ #include <soc/msr.h> #include <types.h> #include "chip.h" -#include <soc/cppc.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/soc/amd/common/block/acpi/Kconfig b/src/soc/amd/common/block/acpi/Kconfig index b4dcec7f385f..9c15f2176554 100644 --- a/src/soc/amd/common/block/acpi/Kconfig +++ b/src/soc/amd/common/block/acpi/Kconfig @@ -8,6 +8,9 @@ config SOC_AMD_COMMON_BLOCK_ACPI config SOC_AMD_COMMON_BLOCK_ACPI_ALIB bool +config SOC_AMD_COMMON_BLOCK_ACPI_CPPC + bool + config SOC_AMD_COMMON_BLOCK_ACPI_GPIO bool diff --git a/src/soc/amd/common/block/acpi/Makefile.inc b/src/soc/amd/common/block/acpi/Makefile.inc index 862cf6de3b60..f7dc10795560 100644 --- a/src/soc/amd/common/block/acpi/Makefile.inc +++ b/src/soc/amd/common/block/acpi/Makefile.inc @@ -11,6 +11,7 @@ ramstage-y += pm_state.c ramstage-y += tables.c ramstage-$(CONFIG_ACPI_BERT) += bert.c ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI_ALIB) += alib.c +ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI_CPPC) += cppc.c ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI_GPIO) += gpio.c ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI_IVRS) += ivrs.c diff --git a/src/soc/amd/cezanne/cppc.c b/src/soc/amd/common/block/acpi/cppc.c index da940afcd407..224034d15924 100644 --- a/src/soc/amd/cezanne/cppc.c +++ b/src/soc/amd/common/block/acpi/cppc.c @@ -2,8 +2,8 @@ #include <acpi/acpi_pm.h> #include <acpi/acpigen.h> +#include <amdblocks/cppc.h> #include <arch/cpu.h> -#include <soc/cppc.h> #include <soc/msr.h> /* diff --git a/src/soc/amd/cezanne/include/soc/cppc.h b/src/soc/amd/common/block/include/amdblocks/cppc.h index 7961f60794bf..7961f60794bf 100644 --- a/src/soc/amd/cezanne/include/soc/cppc.h +++ b/src/soc/amd/common/block/include/amdblocks/cppc.h |