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| author | Elyes Haouas <ehaouas@noos.fr> | 2023-09-10 10:39:11 +0200 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-09-11 15:51:44 +0000 |
| commit | 98a9b34854f8ce46be908956dee1661b0a4d36a3 (patch) | |
| tree | 373e27542eb655072e676470f528e615764d9afb | |
| parent | 78d2469f057631096dbc50caae93511f9206232e (diff) | |
| download | coreboot-98a9b34854f8ce46be908956dee1661b0a4d36a3.tar.gz coreboot-98a9b34854f8ce46be908956dee1661b0a4d36a3.tar.bz2 coreboot-98a9b34854f8ce46be908956dee1661b0a4d36a3.zip | |
soc/nvidia: Remove space between function name and '('
Change-Id: I5b0cdb7b8484080db6571d70ddef145bbaf2e87d
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77769
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/soc/nvidia/tegra210/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/nvidia/tegra210/cpu.c b/src/soc/nvidia/tegra210/cpu.c index fa8d3519d3e7..c31b0046b9ad 100644 --- a/src/soc/nvidia/tegra210/cpu.c +++ b/src/soc/nvidia/tegra210/cpu.c @@ -21,7 +21,7 @@ static void enable_core_clocks(int cpu) CRC_RST_CPUG_CLR_CORE3 | CRC_RST_CPUG_CLR_CX3, }; - assert (cpu < CONFIG_MAX_CPUS); + assert(cpu < CONFIG_MAX_CPUS); /* Clear reset of CPU components. */ write32(CLK_RST_REG(rst_cpug_cmplx_clr), cpu_clocks[cpu]); |