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| author | Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> | 2022-01-07 16:39:53 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-18 16:14:47 +0000 |
| commit | 9a14fab340b4c8e0afd8bf04746f51ea189fdf5f (patch) | |
| tree | 4c5d07d1cd4ad77418503469cedaed86ccca9f0e | |
| parent | 0fd734046a131ec5433573eb79127d9ea9d6d66e (diff) | |
| download | coreboot-9a14fab340b4c8e0afd8bf04746f51ea189fdf5f.tar.gz coreboot-9a14fab340b4c8e0afd8bf04746f51ea189fdf5f.tar.bz2 coreboot-9a14fab340b4c8e0afd8bf04746f51ea189fdf5f.zip | |
mb/intel/adlrvp_n: Configure EC in RW GPIO
EC_IN_RW signal from EC GPIO is connected to GPIO E7 of SOC. This GPIO
can be used to check EC status trusted (LOW: in RO) or untrusted (HIGH:
in RW).
BRANCH=None
BUG=None
TEST=Issue manual recovery and confirm DUT is entering recovery mode.
Change-Id: Ib8b6be9fcda24bd2bb479b5b6c01f24a6e9c7b1f
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60896
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
| -rw-r--r-- | src/mainboard/intel/adlrvp/chromeos.c | 6 | ||||
| -rw-r--r-- | src/mainboard/intel/adlrvp/gpio_n.c | 3 |
2 files changed, 4 insertions, 5 deletions
diff --git a/src/mainboard/intel/adlrvp/chromeos.c b/src/mainboard/intel/adlrvp/chromeos.c index fce365d37f7a..d7e55a91dc67 100644 --- a/src/mainboard/intel/adlrvp/chromeos.c +++ b/src/mainboard/intel/adlrvp/chromeos.c @@ -16,7 +16,8 @@ void fill_lb_gpios(struct lb_gpios *gpios) {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, {GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW), "EC in RW"}, }; - if (CONFIG(BOARD_INTEL_ADLRVP_P_EXT_EC) || CONFIG(BOARD_INTEL_ADLRVP_M_EXT_EC)) + if (CONFIG(BOARD_INTEL_ADLRVP_P_EXT_EC) || CONFIG(BOARD_INTEL_ADLRVP_M_EXT_EC) || + CONFIG(BOARD_INTEL_ADLRVP_N_EXT_EC)) lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); else lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios) - 1); @@ -50,7 +51,8 @@ void mainboard_chromeos_acpi_generate(void) chromeos_acpi_gpio_generate(gpios, num); } -#if (CONFIG(BOARD_INTEL_ADLRVP_P_EXT_EC) || CONFIG(BOARD_INTEL_ADLRVP_M_EXT_EC)) +#if (CONFIG(BOARD_INTEL_ADLRVP_P_EXT_EC) || CONFIG(BOARD_INTEL_ADLRVP_M_EXT_EC) ||\ + CONFIG(BOARD_INTEL_ADLRVP_N_EXT_EC)) int get_ec_is_trusted(void) { /* EC is trusted if not in RW. */ diff --git a/src/mainboard/intel/adlrvp/gpio_n.c b/src/mainboard/intel/adlrvp/gpio_n.c index 8e395e5f21ab..e520550514ec 100644 --- a/src/mainboard/intel/adlrvp/gpio_n.c +++ b/src/mainboard/intel/adlrvp/gpio_n.c @@ -26,9 +26,6 @@ static const struct pad_config gpio_table[] = { /* EC_SLP_S0_CS_N */ PAD_CFG_GPO(GPP_E4, 1, PLTRST), - /* GPPC_E7_EC_SMI_N */ - PAD_CFG_GPI_SMI(GPP_E7, NONE, PLTRST, EDGE_SINGLE, INVERT), - /* H15 : DDPB_CTRLCLK ==> DDIB_HDMI_CTRLCLK */ PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1), /* H17 : DDPB_CTRLDATA ==> DDIB_HDMI_CTRLDATA */ |