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authorWerner Zeh <werner.zeh@siemens.com>2016-09-08 07:52:03 +0200
committerMartin Roth <martinroth@google.com>2016-09-12 22:41:45 +0200
commit9d18e330fd2e6a3f9daf31f2111f82af0dd3c78d (patch)
tree23f3f1114bb6bd5cecf66708d213b49cad636ecf
parent6e8b3c11105682e58ccb0574148654adecc532f7 (diff)
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siemens/mc_bdx1: Enable decoding for COM 3 & COM 4 on LPC
Since this mainboard provides 4 COM ports on LPC, enable decoding of the corresponding addresses using the generic LPC decode registers. Change-Id: I0e93d40dca01d55f3567a18c7ec02269e3bec466 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/16535 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--src/mainboard/siemens/mc_bdx1/mainboard.c5
-rw-r--r--src/soc/intel/fsp_broadwell_de/include/soc/lpc.h4
2 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/siemens/mc_bdx1/mainboard.c b/src/mainboard/siemens/mc_bdx1/mainboard.c
index 8a5226b09fc3..fe35fe1c144f 100644
--- a/src/mainboard/siemens/mc_bdx1/mainboard.c
+++ b/src/mainboard/siemens/mc_bdx1/mainboard.c
@@ -33,6 +33,7 @@
#include <i210.h>
#include <soc/pci_devs.h>
#include <soc/irq.h>
+#include <soc/lpc.h>
#define MAX_PATH_DEPTH 12
#define MAX_NUM_MAPPINGS 10
@@ -102,6 +103,10 @@ static void mainboard_init(void *chip_info)
actl &= ~SCIS_MASK;
actl |= SCIS_IRQ10;
pci_write_config8(dev, ACPI_CNTL_OFFSET, actl);
+
+ /* Enable additional I/O decoding ranges on LPC for COM 3 and COM 4 */
+ pci_write_config32(dev, LPC_GEN1_DEC, 0x1C02E9);
+ pci_write_config32(dev, LPC_GEN2_DEC, 0x1C03E9);
}
static void mainboard_final(void *chip_info)
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h b/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h
index 30cb5764f2c8..60cdc89f5110 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h
@@ -25,6 +25,10 @@
#define PIRQ_RCR2 0x68
#define LPC_IO_DEC 0x80
#define LPC_EN 0x82
+#define LPC_GEN1_DEC 0x84
+#define LPC_GEN2_DEC 0x88
+#define LPC_GEN3_DEC 0x8c
+#define LPC_GEN4_DEC 0x90
#define GEN_PMCON_1 0xA0
#define GEN_PMCON_2 0xA2
#define GEN_PMCON_3 0xA4