diff options
| author | Zheng Bao <zheng.bao@amd.com> | 2009-12-28 09:59:44 +0000 |
|---|---|---|
| committer | Zheng Bao <Zheng.Bao@amd.com> | 2009-12-28 09:59:44 +0000 |
| commit | 9db833bec394b886ca990965970cdb100b65d9ac (patch) | |
| tree | b06137607c918debaf7afb522feb3a56ee6f7ba5 | |
| parent | 0f0aa15e7eac54dae8d1710c3a4751c80b61709a (diff) | |
| download | coreboot-9db833bec394b886ca990965970cdb100b65d9ac.tar.gz coreboot-9db833bec394b886ca990965970cdb100b65d9ac.tar.bz2 coreboot-9db833bec394b886ca990965970cdb100b65d9ac.zip | |
trival. All the changes is about comment and spaces.
In superio folder.
1. Delete trailing white spaces.
2. Change the // comment to /* */.
3. Add some copyright header.
4. reindent.
5. delete multi blank lines.
I tried my best to find them. If anything left, please fix it
or tell me.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4993 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
178 files changed, 2600 insertions, 897 deletions
diff --git a/src/superio/fintek/f71805f/Config.lb b/src/superio/fintek/f71805f/Config.lb index b6ecdba382fa..3773758bb5f6 100644 --- a/src/superio/fintek/f71805f/Config.lb +++ b/src/superio/fintek/f71805f/Config.lb @@ -20,4 +20,3 @@ config chip.h object superio.o - diff --git a/src/superio/fintek/f71805f/Makefile.inc b/src/superio/fintek/f71805f/Makefile.inc index d56723dc4db3..db5d93aa7981 100644 --- a/src/superio/fintek/f71805f/Makefile.inc +++ b/src/superio/fintek/f71805f/Makefile.inc @@ -20,4 +20,3 @@ #config chip.h obj-$(CONFIG_SUPERIO_FINTEK_F71805F) += superio.o - diff --git a/src/superio/fintek/f71805f/f71805f.h b/src/superio/fintek/f71805f/f71805f.h index 41cb699987da..587746093ebe 100644 --- a/src/superio/fintek/f71805f/f71805f.h +++ b/src/superio/fintek/f71805f/f71805f.h @@ -24,7 +24,7 @@ * - URL: http://www.fintek.com.tw/eng/products.asp?BID=1&SID=17 * - PDF: http://www.fintek.com.tw/files/productfiles/F71805F_V025.pdf * - Revision: V0.25P - */ + */ /* Logical Device Numbers (LDN). */ #define F71805F_FDC 0x00 /* Floppy */ diff --git a/src/superio/fintek/f71805f/superio.c b/src/superio/fintek/f71805f/superio.c index 4df9afc9f92f..6476e0a6f7cc 100644 --- a/src/superio/fintek/f71805f/superio.c +++ b/src/superio/fintek/f71805f/superio.c @@ -29,12 +29,12 @@ #include "chip.h" #include "f71805f.h" -static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(device_t dev) { outb(0x87, dev->path.pnp.port); } -static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(device_t dev) { outb(0xaa, dev->path.pnp.port); } @@ -46,7 +46,7 @@ static void f71805f_init(device_t dev) if (!dev->enabled) return; - + switch(dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71805F_SP1: @@ -110,4 +110,3 @@ struct chip_operations superio_fintek_f71805f_ops = { CHIP_NAME("Fintek F71805F Super I/O") .enable_dev = enable_dev }; - diff --git a/src/superio/intel/i3100/Config.lb b/src/superio/intel/i3100/Config.lb index 7349617b4d92..cf4b0f3f25c7 100644 --- a/src/superio/intel/i3100/Config.lb +++ b/src/superio/intel/i3100/Config.lb @@ -20,4 +20,3 @@ config chip.h object superio.o - diff --git a/src/superio/intel/i3100/Makefile.inc b/src/superio/intel/i3100/Makefile.inc index e622b7205b63..d9b76d0a81b6 100644 --- a/src/superio/intel/i3100/Makefile.inc +++ b/src/superio/intel/i3100/Makefile.inc @@ -20,4 +20,3 @@ #config chip.h obj-$(CONFIG_SUPERIO_INTEL_I3100) += superio.o - diff --git a/src/superio/intel/i3100/superio.c b/src/superio/intel/i3100/superio.c index db3047b45909..6b389047c2c6 100644 --- a/src/superio/intel/i3100/superio.c +++ b/src/superio/intel/i3100/superio.c @@ -105,4 +105,3 @@ struct chip_operations superio_intel_i3100_ops = { CHIP_NAME("Intel 3100 Super I/O") .enable_dev = enable_dev, }; - diff --git a/src/superio/ite/it8661f/Config.lb b/src/superio/ite/it8661f/Config.lb index e1290e2fad0b..8e91c171ceee 100644 --- a/src/superio/ite/it8661f/Config.lb +++ b/src/superio/ite/it8661f/Config.lb @@ -20,4 +20,3 @@ config chip.h object superio.o - diff --git a/src/superio/ite/it8661f/Makefile.inc b/src/superio/ite/it8661f/Makefile.inc index 8a17ae2c8631..5bd564216af4 100644 --- a/src/superio/ite/it8661f/Makefile.inc +++ b/src/superio/ite/it8661f/Makefile.inc @@ -20,4 +20,3 @@ #config chip.h obj-$(CONFIG_SUPERIO_ITE_IT8661F) += superio.o - diff --git a/src/superio/ite/it8661f/chip.h b/src/superio/ite/it8661f/chip.h index 5a173b1f3e1a..f00e49e851bd 100644 --- a/src/superio/ite/it8661f/chip.h +++ b/src/superio/ite/it8661f/chip.h @@ -33,4 +33,3 @@ struct superio_ite_it8661f_config { }; #endif /* _SUPERIO_ITE_IT8661F */ - diff --git a/src/superio/ite/it8661f/it8661f.h b/src/superio/ite/it8661f/it8661f.h index 07327d833863..453627ae6dff 100644 --- a/src/superio/ite/it8661f/it8661f.h +++ b/src/superio/ite/it8661f/it8661f.h @@ -29,4 +29,3 @@ #define IT8661F_PP 0x03 /* Parallel port */ #define IT8661F_IR 0x04 /* IR */ #define IT8661F_GPIO 0x05 /* GPIO & Alternate Function Configuration */ - diff --git a/src/superio/ite/it8661f/it8661f_early_serial.c b/src/superio/ite/it8661f/it8661f_early_serial.c index b6826a7dabd6..12da30161616 100644 --- a/src/superio/ite/it8661f/it8661f_early_serial.c +++ b/src/superio/ite/it8661f/it8661f_early_serial.c @@ -91,4 +91,3 @@ static void it8661f_enable_serial(device_t dev, unsigned iobase) /* (3) Exit the configuration state (MB PnP mode). */ it8661f_sio_write(0x00, IT8661F_CONFIG_REG_CC, 0x02); } - diff --git a/src/superio/ite/it8661f/superio.c b/src/superio/ite/it8661f/superio.c index 20e5070678b7..7c5294d65bcb 100644 --- a/src/superio/ite/it8661f/superio.c +++ b/src/superio/ite/it8661f/superio.c @@ -66,8 +66,8 @@ static struct device_operations ops = { /* TODO: FDC, PP, IR, GPIO. */ static struct pnp_info pnp_dev_info[] = { - { &ops, IT8661F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, IT8661F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, + { &ops, IT8661F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, IT8661F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, }; static void enable_dev(struct device *dev) @@ -80,4 +80,3 @@ struct chip_operations superio_ite_it8661f_ops = { CHIP_NAME("ITE IT8661F Super I/O") .enable_dev = enable_dev, }; - diff --git a/src/superio/ite/it8671f/Config.lb b/src/superio/ite/it8671f/Config.lb index e1290e2fad0b..8e91c171ceee 100644 --- a/src/superio/ite/it8671f/Config.lb +++ b/src/superio/ite/it8671f/Config.lb @@ -20,4 +20,3 @@ config chip.h object superio.o - diff --git a/src/superio/ite/it8671f/Makefile.inc b/src/superio/ite/it8671f/Makefile.inc index 32c26227de79..18edd9b81ca2 100644 --- a/src/superio/ite/it8671f/Makefile.inc +++ b/src/superio/ite/it8671f/Makefile.inc @@ -20,4 +20,3 @@ #config chip.h obj-$(CONFIG_SUPERIO_ITE_IT8671F) += superio.o - diff --git a/src/superio/ite/it8671f/chip.h b/src/superio/ite/it8671f/chip.h index b4c4d3f21d27..7d0e5acb6ac1 100644 --- a/src/superio/ite/it8671f/chip.h +++ b/src/superio/ite/it8671f/chip.h @@ -33,4 +33,3 @@ struct superio_ite_it8671f_config { }; #endif /* _SUPERIO_ITE_IT8671F */ - diff --git a/src/superio/ite/it8671f/it8671f.h b/src/superio/ite/it8671f/it8671f.h index b77c77f1ec68..07b4d542ccc3 100644 --- a/src/superio/ite/it8671f/it8671f.h +++ b/src/superio/ite/it8671f/it8671f.h @@ -27,4 +27,3 @@ #define IT8671F_PP 0x03 /* Parallel port */ #define IT8671F_KBCK 0x05 /* Keyboard */ #define IT8671F_KBCM 0x06 /* Mouse */ - diff --git a/src/superio/ite/it8671f/it8671f_early_serial.c b/src/superio/ite/it8671f/it8671f_early_serial.c index f894562ca9cf..56d1d8c2dd82 100644 --- a/src/superio/ite/it8671f/it8671f_early_serial.c +++ b/src/superio/ite/it8671f/it8671f_early_serial.c @@ -91,4 +91,3 @@ static void it8671f_enable_serial(device_t dev, unsigned iobase) /* (3) Exit the configuration state (MB PnP mode). */ it8671f_sio_write(0x00, IT8671F_CONFIG_REG_CC, 0x02); } - diff --git a/src/superio/ite/it8671f/superio.c b/src/superio/ite/it8671f/superio.c index f77c8bddb16a..e0007c56d6e3 100644 --- a/src/superio/ite/it8671f/superio.c +++ b/src/superio/ite/it8671f/superio.c @@ -70,9 +70,9 @@ static struct device_operations ops = { /* TODO: FDC, PP, KBCM. */ static struct pnp_info pnp_dev_info[] = { - { &ops, IT8671F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, IT8671F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, - { &ops, IT8671F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, + { &ops, IT8671F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, IT8671F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, + { &ops, IT8671F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, }; static void enable_dev(struct device *dev) @@ -85,4 +85,3 @@ struct chip_operations superio_ite_it8671f_ops = { CHIP_NAME("ITE IT8671F Super I/O") .enable_dev = enable_dev, }; - diff --git a/src/superio/ite/it8673f/Config.lb b/src/superio/ite/it8673f/Config.lb index e1290e2fad0b..8e91c171ceee 100644 --- a/src/superio/ite/it8673f/Config.lb +++ b/src/superio/ite/it8673f/Config.lb @@ -20,4 +20,3 @@ config chip.h object superio.o - diff --git a/src/superio/ite/it8673f/Makefile.inc b/src/superio/ite/it8673f/Makefile.inc index f4ee01cec6c6..3bb5b1c4bc40 100644 --- a/src/superio/ite/it8673f/Makefile.inc +++ b/src/superio/ite/it8673f/Makefile.inc @@ -20,4 +20,3 @@ #config chip.h obj-$(CONFIG_SUPERIO_ITE_IT8673F) += superio.o - diff --git a/src/superio/ite/it8673f/chip.h b/src/superio/ite/it8673f/chip.h index 02bc33dece18..696705931769 100644 --- a/src/superio/ite/it8673f/chip.h +++ b/src/superio/ite/it8673f/chip.h @@ -33,4 +33,3 @@ struct superio_ite_it8673f_config { }; #endif /* _SUPERIO_ITE_IT8673F */ - diff --git a/src/superio/ite/it8673f/it8673f.h b/src/superio/ite/it8673f/it8673f.h index 46bc31f78de9..6734c0e259c4 100644 --- a/src/superio/ite/it8673f/it8673f.h +++ b/src/superio/ite/it8673f/it8673f.h @@ -28,4 +28,3 @@ #define IT8673F_FAN 0x04 /* Fan controller */ #define IT8673F_KBCK 0x05 /* Keyboard */ #define IT8673F_KBCM 0x06 /* Mouse */ - diff --git a/src/superio/ite/it8673f/it8673f_early_serial.c b/src/superio/ite/it8673f/it8673f_early_serial.c index 44cac26d0191..9edbfb9adccc 100644 --- a/src/superio/ite/it8673f/it8673f_early_serial.c +++ b/src/superio/ite/it8673f/it8673f_early_serial.c @@ -89,4 +89,3 @@ static void it8673f_enable_serial(device_t dev, unsigned iobase) /* (3) Exit the configuration state (MB PnP mode). */ it8673f_sio_write(0x00, IT8673F_CONFIG_REG_CC, 0x02); } - diff --git a/src/superio/ite/it8673f/superio.c b/src/superio/ite/it8673f/superio.c index f4dff1403a92..a5c99b1dba83 100644 --- a/src/superio/ite/it8673f/superio.c +++ b/src/superio/ite/it8673f/superio.c @@ -87,4 +87,3 @@ struct chip_operations superio_ite_it8673f_ops = { CHIP_NAME("ITE IT8673F Super I/O") .enable_dev = enable_dev, }; - diff --git a/src/superio/ite/it8705f/Config.lb b/src/superio/ite/it8705f/Config.lb index e1290e2fad0b..8e91c171ceee 100644 --- a/src/superio/ite/it8705f/Config.lb +++ b/src/superio/ite/it8705f/Config.lb @@ -20,4 +20,3 @@ config chip.h object superio.o - diff --git a/src/superio/ite/it8705f/Makefile.inc b/src/superio/ite/it8705f/Makefile.inc index 468c0e8aec25..6c20a4130081 100644 --- a/src/superio/ite/it8705f/Makefile.inc +++ b/src/superio/ite/it8705f/Makefile.inc @@ -20,4 +20,3 @@ #config chip.h obj-$(CONFIG_SUPERIO_ITE_IT8705F) += superio.o - diff --git a/src/superio/ite/it8705f/chip.h b/src/superio/ite/it8705f/chip.h index c970ca882061..7702247ed963 100644 --- a/src/superio/ite/it8705f/chip.h +++ b/src/superio/ite/it8705f/chip.h @@ -33,4 +33,3 @@ struct superio_ite_it8705f_config { }; #endif /* _SUPERIO_ITE_IT8705F */ - diff --git a/src/superio/ite/it8705f/it8705f.h b/src/superio/ite/it8705f/it8705f.h index 541b1a5dfaee..68172d5aeca0 100644 --- a/src/superio/ite/it8705f/it8705f.h +++ b/src/superio/ite/it8705f/it8705f.h @@ -33,4 +33,3 @@ #define IT8705F_GAME 0x06 /* GAME port */ #define IT8705F_IR 0x07 /* Consumer IR */ #define IT8705F_MIDI 0x08 /* MIDI port */ - diff --git a/src/superio/ite/it8705f/it8705f_early_serial.c b/src/superio/ite/it8705f/it8705f_early_serial.c index a8615d3984c6..8930d1b8df74 100644 --- a/src/superio/ite/it8705f/it8705f_early_serial.c +++ b/src/superio/ite/it8705f/it8705f_early_serial.c @@ -63,8 +63,8 @@ static void it8705f_enable_serial(device_t dev, unsigned iobase) /* (2) Modify the data of configuration registers. */ /* Select the chip to configure (if there's more than one). - Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. - If this register is not written, both chips are configured. */ + Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. + If this register is not written, both chips are configured. */ /* it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CONFIGSEL, 0x00); */ /* Enable serial port(s). */ @@ -80,4 +80,3 @@ static void it8705f_enable_serial(device_t dev, unsigned iobase) /* (3) Exit the configuration state (MB PnP mode). */ it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CC, 0x02); } - diff --git a/src/superio/ite/it8705f/superio.c b/src/superio/ite/it8705f/superio.c index fda705c27a4f..27f66c3bf579 100644 --- a/src/superio/ite/it8705f/superio.c +++ b/src/superio/ite/it8705f/superio.c @@ -74,8 +74,8 @@ static struct device_operations ops = { /* TODO: FDC, PP, EC, GPIO, GAME, IR, MIDI. */ static struct pnp_info pnp_dev_info[] = { - { &ops, IT8705F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, IT8705F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, + { &ops, IT8705F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, IT8705F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, }; static void enable_dev(struct device *dev) @@ -88,4 +88,3 @@ struct chip_operations superio_ite_it8705f_ops = { CHIP_NAME("ITE IT8705F Super I/O") .enable_dev = enable_dev, }; - diff --git a/src/superio/ite/it8712f/Config.lb b/src/superio/ite/it8712f/Config.lb index e1290e2fad0b..8e91c171ceee 100644 --- a/src/superio/ite/it8712f/Config.lb +++ b/src/superio/ite/it8712f/Config.lb @@ -20,4 +20,3 @@ config chip.h object superio.o - diff --git a/src/superio/ite/it8712f/Makefile.inc b/src/superio/ite/it8712f/Makefile.inc index 898c87906ef7..a7078e101b84 100644 --- a/src/superio/ite/it8712f/Makefile.inc +++ b/src/superio/ite/it8712f/Makefile.inc @@ -20,4 +20,3 @@ #config chip.h obj-$(CONFIG_SUPERIO_ITE_IT8712F) += superio.o - diff --git a/src/superio/ite/it8712f/chip.h b/src/superio/ite/it8712f/chip.h index f47e3cc33c13..22dfa8dcc83b 100644 --- a/src/superio/ite/it8712f/chip.h +++ b/src/superio/ite/it8712f/chip.h @@ -33,4 +33,3 @@ struct superio_ite_it8712f_config { }; #endif /* _SUPERIO_ITE_IT8712F */ - diff --git a/src/superio/ite/it8712f/it8712f.h b/src/superio/ite/it8712f/it8712f.h index d4231972aae8..260b12d79858 100644 --- a/src/superio/ite/it8712f/it8712f.h +++ b/src/superio/ite/it8712f/it8712f.h @@ -32,4 +32,3 @@ #define IT8712F_MIDI 0x08 /* MIDI port */ #define IT8712F_GAME 0x09 /* GAME port */ #define IT8712F_IR 0x0a /* Consumer IR */ - diff --git a/src/superio/ite/it8712f/it8712f_early_serial.c b/src/superio/ite/it8712f/it8712f_early_serial.c index 03899625bfb2..e0bfafd4aca4 100644 --- a/src/superio/ite/it8712f/it8712f_early_serial.c +++ b/src/superio/ite/it8712f/it8712f_early_serial.c @@ -47,7 +47,6 @@ static void it8712f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) outb(value, SIO_DATA); } - static void it8712f_enter_conf(void) { /* Enter the configuration state (MB PnP mode). */ @@ -67,7 +66,6 @@ static void it8712f_exit_conf(void) it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CC, 0x02); } - static void it8712f_24mhz_clkin(void) { it8712f_enter_conf(); @@ -76,10 +74,10 @@ static void it8712f_24mhz_clkin(void) it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CLOCKSEL, 0x1); it8712f_exit_conf(); - } -static void it8712f_enable_3vsbsw(void) { +static void it8712f_enable_3vsbsw(void) +{ /* We need to set enable 3VSBSW#, this was documented only in IT8712F_V0.9.2! LDN 7, reg 0x2a - needed for S3, or memory power will be cut off. @@ -93,7 +91,6 @@ static void it8712f_enable_3vsbsw(void) { it8712f_exit_conf(); } - static void it8712f_kill_watchdog(void) { it8712f_enter_conf(); @@ -114,8 +111,8 @@ static void it8712f_enable_serial(device_t dev, unsigned iobase) /* (2) Modify the data of configuration registers. */ /* Select the chip to configure (if there's more than one). - Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. - If this register is not written, both chips are configured. */ + Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. + If this register is not written, both chips are configured. */ /* it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CONFIGSEL, 0x00); */ /* Enable serial port(s). */ diff --git a/src/superio/ite/it8712f/superio.c b/src/superio/ite/it8712f/superio.c index 6a461f74d877..1636d1987a0f 100644 --- a/src/superio/ite/it8712f/superio.c +++ b/src/superio/ite/it8712f/superio.c @@ -145,4 +145,3 @@ struct chip_operations superio_ite_it8712f_ops = { CHIP_NAME("ITE IT8712F Super I/O") .enable_dev = enable_dev, }; - diff --git a/src/superio/ite/it8716f/Config.lb b/src/superio/ite/it8716f/Config.lb index e1290e2fad0b..8e91c171ceee 100644 --- a/src/superio/ite/it8716f/Config.lb +++ b/src/superio/ite/it8716f/Config.lb @@ -20,4 +20,3 @@ config chip.h object superio.o - diff --git a/src/superio/ite/it8716f/Makefile.inc b/src/superio/ite/it8716f/Makefile.inc index cb7ac32c4076..fe0dab0699ce 100644 --- a/src/superio/ite/it8716f/Makefile.inc +++ b/src/superio/ite/it8716f/Makefile.inc @@ -20,4 +20,3 @@ #config chip.h obj-$(CONFIG_SUPERIO_ITE_IT8716F) += superio.o - diff --git a/src/superio/ite/it8716f/chip.h b/src/superio/ite/it8716f/chip.h index d0991b700db6..b7136f7a5914 100644 --- a/src/superio/ite/it8716f/chip.h +++ b/src/superio/ite/it8716f/chip.h @@ -33,4 +33,3 @@ struct superio_ite_it8716f_config { }; #endif /* _SUPERIO_ITE_IT8716F */ - diff --git a/src/superio/ite/it8716f/it8716f.h b/src/superio/ite/it8716f/it8716f.h index d3a6d58c6199..cc6ad9c4e36f 100644 --- a/src/superio/ite/it8716f/it8716f.h +++ b/src/superio/ite/it8716f/it8716f.h @@ -32,4 +32,3 @@ #define IT8716F_MIDI 0x08 /* MIDI port */ #define IT8716F_GAME 0x09 /* GAME port */ #define IT8716F_IR 0x0a /* Consumer IR */ - diff --git a/src/superio/ite/it8716f/it8716f_early_init.c b/src/superio/ite/it8716f/it8716f_early_init.c index e8fdeb8d8f58..5a621f19c191 100644 --- a/src/superio/ite/it8716f/it8716f_early_init.c +++ b/src/superio/ite/it8716f/it8716f_early_init.c @@ -35,4 +35,3 @@ static void it8716f_enable_dev(device_t dev, unsigned iobase) pnp_set_iobase(dev, PNP_IDX_IO0, iobase); pnp_set_enable(dev, 1); } - diff --git a/src/superio/ite/it8716f/it8716f_early_serial.c b/src/superio/ite/it8716f/it8716f_early_serial.c index e34cf4210c65..37a79a1594de 100644 --- a/src/superio/ite/it8716f/it8716f_early_serial.c +++ b/src/superio/ite/it8716f/it8716f_early_serial.c @@ -41,7 +41,7 @@ /* Perform MB PnP setup to put the SIO chip at 0x2e. */ /* Base address 0x2e: 0x87 0x01 0x55 0x55. */ /* Base address 0x4e: 0x87 0x01 0x55 0xaa. */ -static inline void pnp_enter_ext_func_mode(device_t dev) +static inline void pnp_enter_ext_func_mode(device_t dev) { unsigned port = dev >> 8; outb(0x87, port); @@ -68,4 +68,3 @@ static void it8716f_enable_serial(device_t dev, unsigned iobase) pnp_set_enable(dev, 1); pnp_exit_ext_func_mode(dev); } - diff --git a/src/superio/ite/it8718f/Config.lb b/src/superio/ite/it8718f/Config.lb index e1290e2fad0b..8e91c171ceee 100644 --- a/src/superio/ite/it8718f/Config.lb +++ b/src/superio/ite/it8718f/Config.lb @@ -20,4 +20,3 @@ config chip.h object superio.o - diff --git a/src/superio/ite/it8718f/Makefile.inc b/src/superio/ite/it8718f/Makefile.inc index 9b28eb92fb19..257afc9240eb 100644 --- a/src/superio/ite/it8718f/Makefile.inc +++ b/src/superio/ite/it8718f/Makefile.inc @@ -20,4 +20,3 @@ #config chip.h obj-$(CONFIG_SUPERIO_ITE_IT8718F) += superio.o - diff --git a/src/superio/ite/it8718f/chip.h b/src/superio/ite/it8718f/chip.h index 9bea3a58c34f..c230014b2fbe 100644 --- a/src/superio/ite/it8718f/chip.h +++ b/src/superio/ite/it8718f/chip.h @@ -33,4 +33,3 @@ struct superio_ite_it8718f_config { }; #endif /* _SUPERIO_ITE_IT8718F */ - diff --git a/src/superio/ite/it8718f/it8718f_early_serial.c b/src/superio/ite/it8718f/it8718f_early_serial.c index f4fa04ef23ef..6aae54d65ef7 100644 --- a/src/superio/ite/it8718f/it8718f_early_serial.c +++ b/src/superio/ite/it8718f/it8718f_early_serial.c @@ -83,8 +83,8 @@ static void it8718f_enable_serial(device_t dev, unsigned iobase) /* (2) Modify the data of configuration registers. */ /* Select the chip to configure (if there's more than one). - Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. - If this register is not written, both chips are configured. */ + Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. + If this register is not written, both chips are configured. */ /* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CONFIGSEL, 0x00); */ /* Enable serial port(s). */ @@ -97,4 +97,3 @@ static void it8718f_enable_serial(device_t dev, unsigned iobase) /* (3) Exit the configuration state (MB PnP mode). */ it8718f_exit_conf(); } - diff --git a/src/superio/ite/it8718f/superio.c b/src/superio/ite/it8718f/superio.c index 3c1f541b137f..1d1d31fcd30f 100644 --- a/src/superio/ite/it8718f/superio.c +++ b/src/superio/ite/it8718f/superio.c @@ -74,9 +74,9 @@ static struct device_operations ops = { /* TODO: FDC, PP, EC, KBCM, IR. */ static struct pnp_info pnp_dev_info[] = { - { &ops, IT8718F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, IT8718F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, - { &ops, IT8718F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, + { &ops, IT8718F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, IT8718F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, + { &ops, IT8718F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, }; static void enable_dev(struct device *dev) @@ -89,4 +89,3 @@ struct chip_operations superio_ite_it8718f_ops = { CHIP_NAME("ITE IT8718F Super I/O") .enable_dev = enable_dev, }; - diff --git a/src/superio/nsc/pc8374/Config.lb b/src/superio/nsc/pc8374/Config.lb index f62a567d6147..df9204e4bd44 100644 --- a/src/superio/nsc/pc8374/Config.lb +++ b/src/superio/nsc/pc8374/Config.lb @@ -1,2 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + config chip.h object superio.o diff --git a/src/superio/nsc/pc8374/Makefile.inc b/src/superio/nsc/pc8374/Makefile.inc index e1fd7ce40252..db4cd6aaf79b 100644 --- a/src/superio/nsc/pc8374/Makefile.inc +++ b/src/superio/nsc/pc8374/Makefile.inc @@ -1,2 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_NSC_PC8374) += superio.o diff --git a/src/superio/nsc/pc8374/chip.h b/src/superio/nsc/pc8374/chip.h index 7bfa0db10144..2ef9f70ddca7 100644 --- a/src/superio/nsc/pc8374/chip.h +++ b/src/superio/nsc/pc8374/chip.h @@ -1,3 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + struct chip_operations; extern struct chip_operations superio_nsc_pc8374_ops; diff --git a/src/superio/nsc/pc8374/pc8374.h b/src/superio/nsc/pc8374/pc8374.h index 1f166a70fe57..71162d615652 100644 --- a/src/superio/nsc/pc8374/pc8374.h +++ b/src/superio/nsc/pc8374/pc8374.h @@ -1,3 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #define PC8374_FDC 0x00 /* Floppy */ #define PC8374_PP 0x01 /* Parallel port */ #define PC8374_SP2 0x02 /* Com2 */ diff --git a/src/superio/nsc/pc8374/pc8374_early_init.c b/src/superio/nsc/pc8374/pc8374_early_init.c index 24967454b2a2..ac73b2660243 100644 --- a/src/superio/nsc/pc8374/pc8374_early_init.c +++ b/src/superio/nsc/pc8374/pc8374_early_init.c @@ -1,3 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <arch/romcc_io.h> #include "pc8374.h" @@ -22,8 +43,6 @@ static void pc8374_enable(unsigned iobase, u8 *init) val |= *init; outb(val, iobase+1); } - - } static void pc8374_enable_dev(device_t dev, unsigned iobase) @@ -34,4 +53,3 @@ static void pc8374_enable_dev(device_t dev, unsigned iobase) pnp_set_iobase(dev, PNP_IDX_IO0, iobase); pnp_set_enable(dev, 1); } - diff --git a/src/superio/nsc/pc8374/superio.c b/src/superio/nsc/pc8374/superio.c index 7368fe77bb3a..3fed62b0969e 100644 --- a/src/superio/nsc/pc8374/superio.c +++ b/src/superio/nsc/pc8374/superio.c @@ -1,6 +1,23 @@ -/* Copyright 2000 AG Electronics Ltd. */ -/* Copyright 2003-2004 Linux Networx */ -/* This code is distributed without warranty under the GPL v2 (see COPYING) */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ #include <arch/io.h> #include <device/device.h> @@ -26,7 +43,7 @@ static void init(device_t dev) } conf = dev->chip_info; switch(dev->path.pnp.device) { - case PC8374_SP1: + case PC8374_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); break; @@ -51,17 +68,16 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, PC8374_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, }, - { &ops, PC8374_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, }, - { &ops, PC8374_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, - { &ops, PC8374_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, PC8374_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, }, - { &ops, PC8374_KBCM, PNP_IRQ0 }, - { &ops, PC8374_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, - { &ops, PC8374_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, + { &ops, PC8374_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, }, + { &ops, PC8374_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, }, + { &ops, PC8374_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, + { &ops, PC8374_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, PC8374_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, }, + { &ops, PC8374_KBCM, PNP_IRQ0 }, + { &ops, PC8374_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, + { &ops, PC8374_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, }; - static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &ops, diff --git a/src/superio/nsc/pc87309/Config.lb b/src/superio/nsc/pc87309/Config.lb index 77289587c549..512a21862363 100644 --- a/src/superio/nsc/pc87309/Config.lb +++ b/src/superio/nsc/pc87309/Config.lb @@ -1,23 +1,22 @@ -## +## ## This file is part of the coreboot project. -## +## ## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de> -## +## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. -## +## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. -## +## ## You should have received a copy of the GNU General Public License ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## +## config chip.h object superio.o - diff --git a/src/superio/nsc/pc87309/Makefile.inc b/src/superio/nsc/pc87309/Makefile.inc index 204f9e2bb31f..f132d8017e1d 100644 --- a/src/superio/nsc/pc87309/Makefile.inc +++ b/src/superio/nsc/pc87309/Makefile.inc @@ -1,23 +1,22 @@ -## +## ## This file is part of the coreboot project. -## +## ## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de> -## +## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. -## +## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. -## +## ## You should have received a copy of the GNU General Public License ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## +## #config chip.h obj-$(CONFIG_SUPERIO_NSC_PC87309) += superio.o - diff --git a/src/superio/nsc/pc87309/superio.c b/src/superio/nsc/pc87309/superio.c index 6ae33ca544a3..ee84b66aa2fe 100644 --- a/src/superio/nsc/pc87309/superio.c +++ b/src/superio/nsc/pc87309/superio.c @@ -66,7 +66,7 @@ static struct pnp_info pnp_dev_info[] = { {&ops, PC87309_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x04f8, 0},}, {&ops, PC87309_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0x7f8, 0},}, {&ops, PC87309_SP1, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},}, - // TODO: PM. + /* TODO: PM. */ {&ops, PC87309_KBCM, PNP_IRQ0}, {&ops, PC87309_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7f8, 0}, {0x7f8, 0x4},}, }; diff --git a/src/superio/nsc/pc87351/Config.lb b/src/superio/nsc/pc87351/Config.lb index f62a567d6147..df9204e4bd44 100644 --- a/src/superio/nsc/pc87351/Config.lb +++ b/src/superio/nsc/pc87351/Config.lb @@ -1,2 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + config chip.h object superio.o diff --git a/src/superio/nsc/pc87351/Makefile.inc b/src/superio/nsc/pc87351/Makefile.inc index 047842d85217..3f93962a2352 100644 --- a/src/superio/nsc/pc87351/Makefile.inc +++ b/src/superio/nsc/pc87351/Makefile.inc @@ -1,2 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_NSC_PC87351) += superio.o diff --git a/src/superio/nsc/pc87351/chip.h b/src/superio/nsc/pc87351/chip.h index 05a02a256560..d62b1b385590 100644 --- a/src/superio/nsc/pc87351/chip.h +++ b/src/superio/nsc/pc87351/chip.h @@ -1,3 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + struct chip_operations; extern struct chip_operations superio_nsc_pc87351_ops; diff --git a/src/superio/nsc/pc87351/pc87351.h b/src/superio/nsc/pc87351/pc87351.h index dbed582bcea3..f3e0fde11287 100644 --- a/src/superio/nsc/pc87351/pc87351.h +++ b/src/superio/nsc/pc87351/pc87351.h @@ -1,3 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #define PC87351_FDC 0x00 /* Floppy */ #define PC87351_PP 0x01 /* Parallel port */ #define PC87351_SP2 0x02 /* Com2 */ diff --git a/src/superio/nsc/pc87351/pc87351_early_serial.c b/src/superio/nsc/pc87351/pc87351_early_serial.c index 7ec361e85356..2072d4f072a1 100644 --- a/src/superio/nsc/pc87351/pc87351_early_serial.c +++ b/src/superio/nsc/pc87351/pc87351_early_serial.c @@ -1,3 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <arch/romcc_io.h> #include "pc87351.h" diff --git a/src/superio/nsc/pc87351/superio.c b/src/superio/nsc/pc87351/superio.c index 55e4e1098a97..4ee740ac3f12 100644 --- a/src/superio/nsc/pc87351/superio.c +++ b/src/superio/nsc/pc87351/superio.c @@ -1,12 +1,29 @@ -/* Copyright 2000 AG Electronics Ltd. */ -/* Copyright 2003-2004 Linux Networx */ -/* This code is distributed without warranty under the GPL v2 (see COPYING) */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ -/* - * Richard A Smith +/* + * Richard A Smith * I derived this code from the pc87360 device and removed the stuff the 87351 * dosen't do. -*/ + */ #include <arch/io.h> #include <device/device.h> @@ -32,7 +49,7 @@ static void init(device_t dev) } conf = dev->chip_info; switch(dev->path.pnp.device) { - case PC87351_SP1: + case PC87351_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); break; @@ -57,18 +74,17 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, PC87351_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, }, - { &ops, PC87351_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, }, - { &ops, PC87351_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, - { &ops, PC87351_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, PC87351_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, }, - { &ops, PC87351_KBCM, PNP_IRQ0 }, - { &ops, PC87351_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, - { &ops, PC87351_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, - { &ops, PC87351_FSD, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, + { &ops, PC87351_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, }, + { &ops, PC87351_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, }, + { &ops, PC87351_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, + { &ops, PC87351_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, PC87351_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, }, + { &ops, PC87351_KBCM, PNP_IRQ0 }, + { &ops, PC87351_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, + { &ops, PC87351_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, + { &ops, PC87351_FSD, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, }; - static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &pnp_ops, diff --git a/src/superio/nsc/pc87360/Config.lb b/src/superio/nsc/pc87360/Config.lb index f62a567d6147..df9204e4bd44 100644 --- a/src/superio/nsc/pc87360/Config.lb +++ b/src/superio/nsc/pc87360/Config.lb @@ -1,2 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + config chip.h object superio.o diff --git a/src/superio/nsc/pc87360/Makefile.inc b/src/superio/nsc/pc87360/Makefile.inc index 823f7105c85f..6bfaafd8417a 100644 --- a/src/superio/nsc/pc87360/Makefile.inc +++ b/src/superio/nsc/pc87360/Makefile.inc @@ -1,2 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_NSC_PC87360) += superio.o diff --git a/src/superio/nsc/pc87360/chip.h b/src/superio/nsc/pc87360/chip.h index 0d6023b927c2..f3a29ceda388 100644 --- a/src/superio/nsc/pc87360/chip.h +++ b/src/superio/nsc/pc87360/chip.h @@ -1,3 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + struct chip_operations; extern struct chip_operations superio_nsc_pc87360_ops; diff --git a/src/superio/nsc/pc87360/pc87360.h b/src/superio/nsc/pc87360/pc87360.h index 201da8eb6e5d..e2ee823b7579 100644 --- a/src/superio/nsc/pc87360/pc87360.h +++ b/src/superio/nsc/pc87360/pc87360.h @@ -1,3 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #define PC87360_FDC 0x00 /* Floppy */ #define PC87360_PP 0x01 /* Parallel port */ #define PC87360_SP2 0x02 /* Com2 */ diff --git a/src/superio/nsc/pc87360/pc87360_early_serial.c b/src/superio/nsc/pc87360/pc87360_early_serial.c index 696d3a05708d..7cfa4981f4e0 100644 --- a/src/superio/nsc/pc87360/pc87360_early_serial.c +++ b/src/superio/nsc/pc87360/pc87360_early_serial.c @@ -1,7 +1,27 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <arch/romcc_io.h> #include "pc87360.h" - static void pc87360_enable_serial(device_t dev, unsigned iobase) { pnp_set_logical_device(dev); diff --git a/src/superio/nsc/pc87360/superio.c b/src/superio/nsc/pc87360/superio.c index 0cd3c4a65ca1..a0fa47a7af0c 100644 --- a/src/superio/nsc/pc87360/superio.c +++ b/src/superio/nsc/pc87360/superio.c @@ -1,6 +1,23 @@ -/* Copyright 2000 AG Electronics Ltd. */ -/* Copyright 2003-2004 Linux Networx */ -/* This code is distributed without warranty under the GPL v2 (see COPYING) */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ #include <arch/io.h> #include <device/device.h> @@ -26,7 +43,7 @@ static void init(device_t dev) } conf = dev->chip_info; switch(dev->path.pnp.device) { - case PC87360_SP1: + case PC87360_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); break; @@ -51,20 +68,19 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, PC87360_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, }, - { &ops, PC87360_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, }, - { &ops, PC87360_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, - { &ops, PC87360_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, PC87360_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, }, - { &ops, PC87360_KBCM, PNP_IRQ0 }, - { &ops, PC87360_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, - { &ops, PC87360_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, - { &ops, PC87360_ACB, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, - { &ops, PC87360_FSCM, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, - { &ops, PC87360_WDT, PNP_IO0 | PNP_IRQ0, { 0xfffc, 0 } }, + { &ops, PC87360_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, }, + { &ops, PC87360_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, }, + { &ops, PC87360_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, + { &ops, PC87360_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, PC87360_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, }, + { &ops, PC87360_KBCM, PNP_IRQ0 }, + { &ops, PC87360_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, + { &ops, PC87360_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, + { &ops, PC87360_ACB, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, + { &ops, PC87360_FSCM, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, + { &ops, PC87360_WDT, PNP_IO0 | PNP_IRQ0, { 0xfffc, 0 } }, }; - static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &ops, diff --git a/src/superio/nsc/pc87366/Config.lb b/src/superio/nsc/pc87366/Config.lb index f62a567d6147..df9204e4bd44 100644 --- a/src/superio/nsc/pc87366/Config.lb +++ b/src/superio/nsc/pc87366/Config.lb @@ -1,2 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + config chip.h object superio.o diff --git a/src/superio/nsc/pc87366/Makefile.inc b/src/superio/nsc/pc87366/Makefile.inc index 90bf08f7ba49..973bd9e663ee 100644 --- a/src/superio/nsc/pc87366/Makefile.inc +++ b/src/superio/nsc/pc87366/Makefile.inc @@ -1,2 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_NSC_PC87366) += superio.o diff --git a/src/superio/nsc/pc87366/chip.h b/src/superio/nsc/pc87366/chip.h index 440885aec893..31e30ff351c1 100644 --- a/src/superio/nsc/pc87366/chip.h +++ b/src/superio/nsc/pc87366/chip.h @@ -1,3 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + extern struct chip_operations superio_nsc_pc87366_ops; #include <pc80/keyboard.h> diff --git a/src/superio/nsc/pc87366/pc87366.h b/src/superio/nsc/pc87366/pc87366.h index d1bc9de3198c..3ded643ff964 100644 --- a/src/superio/nsc/pc87366/pc87366.h +++ b/src/superio/nsc/pc87366/pc87366.h @@ -1,3 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #define PC87366_FDC 0x00 /* Floppy */ #define PC87366_PP 0x01 /* Parallel port */ #define PC87366_SP2 0x02 /* Com2 */ @@ -13,4 +34,3 @@ #define PC87366_MIDI 0x0C #define PC87366_VLM 0x0D #define PC87366_TMS 0x0E - diff --git a/src/superio/nsc/pc87366/pc87366_early_serial.c b/src/superio/nsc/pc87366/pc87366_early_serial.c index 354714f7b7e5..f50bb091cb51 100644 --- a/src/superio/nsc/pc87366/pc87366_early_serial.c +++ b/src/superio/nsc/pc87366/pc87366_early_serial.c @@ -1,7 +1,27 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <arch/romcc_io.h> #include "pc87366.h" - static void pc87366_enable_serial(device_t dev, unsigned iobase) { pnp_set_logical_device(dev); diff --git a/src/superio/nsc/pc87366/superio.c b/src/superio/nsc/pc87366/superio.c index 514893dad165..f12b7d905d76 100644 --- a/src/superio/nsc/pc87366/superio.c +++ b/src/superio/nsc/pc87366/superio.c @@ -1,6 +1,23 @@ -/* Copyright 2000 AG Electronics Ltd. */ -/* Copyright 2003-2004 Linux Networx */ -/* This code is distributed without warranty under the GPL v2 (see COPYING) */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ #include <arch/io.h> #include <device/device.h> @@ -26,7 +43,7 @@ static void init(device_t dev) } conf = dev->chip_info; switch(dev->path.pnp.device) { - case PC87366_SP1: + case PC87366_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); break; @@ -51,23 +68,22 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, PC87366_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, }, - { &ops, PC87366_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, }, - { &ops, PC87366_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, - { &ops, PC87366_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, PC87366_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, }, - { &ops, PC87366_KBCM, PNP_IRQ0 }, - { &ops, PC87366_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, - { &ops, PC87366_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, - { &ops, PC87366_ACB, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, - { &ops, PC87366_FSCM, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, - { &ops, PC87366_WDT, PNP_IO0 | PNP_IRQ0, { 0xfffc, 0 } }, + { &ops, PC87366_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, }, + { &ops, PC87366_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, }, + { &ops, PC87366_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, + { &ops, PC87366_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, PC87366_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, }, + { &ops, PC87366_KBCM, PNP_IRQ0 }, + { &ops, PC87366_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, + { &ops, PC87366_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, + { &ops, PC87366_ACB, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, + { &ops, PC87366_FSCM, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, + { &ops, PC87366_WDT, PNP_IO0 | PNP_IRQ0, { 0xfffc, 0 } }, }; - static void enable_dev(struct device *dev) { - pnp_enable_devices(dev, &pnp_ops, + pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); } diff --git a/src/superio/nsc/pc87417/Config.lb b/src/superio/nsc/pc87417/Config.lb index f62a567d6147..f863270fba46 100644 --- a/src/superio/nsc/pc87417/Config.lb +++ b/src/superio/nsc/pc87417/Config.lb @@ -1,2 +1,24 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## Copyright (C) 2004 Tyan by yhlu +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + config chip.h object superio.o diff --git a/src/superio/nsc/pc87417/Makefile.inc b/src/superio/nsc/pc87417/Makefile.inc index da23083bde0a..5d1c472bc2b2 100644 --- a/src/superio/nsc/pc87417/Makefile.inc +++ b/src/superio/nsc/pc87417/Makefile.inc @@ -1,2 +1,24 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## Copyright (C) 2004 Tyan by yhlu +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_NSC_PC87417) += superio.o diff --git a/src/superio/nsc/pc87417/chip.h b/src/superio/nsc/pc87417/chip.h index e3c8891d5338..f2bc6f8da56c 100644 --- a/src/superio/nsc/pc87417/chip.h +++ b/src/superio/nsc/pc87417/chip.h @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan by yhlu + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + extern struct chip_operations superio_nsc_pc87417_ops; #include <pc80/keyboard.h> diff --git a/src/superio/nsc/pc87417/pc87417.h b/src/superio/nsc/pc87417/pc87417.h index 7d5cad954501..3171d1fd7d87 100644 --- a/src/superio/nsc/pc87417/pc87417.h +++ b/src/superio/nsc/pc87417/pc87417.h @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan by yhlu + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #define PC87417_FDC 0x00 /* Floppy */ #define PC87417_PP 0x01 /* Parallel Port */ #define PC87417_SP2 0x02 /* Com2 */ @@ -11,7 +33,7 @@ #define PC87417_GPIO_DEV PNP_DEV(0x2e, PC87417_GPIO) /* This is to get around a romcc bug */ -//#define PC87417_XBUS_DEV PNP_DEV(0x2e, PC87417_XBUS) +/* #define PC87417_XBUS_DEV PNP_DEV(0x2e, PC87417_XBUS) */ #define PC87417_XBUS_DEV PNP_DEV(0x2e, 0x0f) #define PC87417_GPSEL 0xf0 @@ -88,5 +110,3 @@ #define PC87417_HAP1 0x14 #define PC87417_XSCNF 0x15 #define PC87417_XWBCNF 0x16 - - diff --git a/src/superio/nsc/pc87417/pc87417_early_init.c b/src/superio/nsc/pc87417/pc87417_early_init.c index 028f02e66e2a..c9332eedbe0c 100644 --- a/src/superio/nsc/pc87417/pc87417_early_init.c +++ b/src/superio/nsc/pc87417/pc87417_early_init.c @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan by yhlu + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <arch/romcc_io.h> #include "pc87417.h" @@ -6,6 +28,7 @@ static void pc87417_disable_dev(device_t dev) pnp_set_logical_device(dev); pnp_set_enable(dev, 0); } + static void pc87417_enable_dev(device_t dev, unsigned iobase) { pnp_set_logical_device(dev); @@ -13,6 +36,7 @@ static void pc87417_enable_dev(device_t dev, unsigned iobase) pnp_set_iobase(dev, PNP_IDX_IO0, iobase); pnp_set_enable(dev, 1); } + static void xbus_cfg(device_t dev) { uint8_t i, data; @@ -27,5 +51,5 @@ static void xbus_cfg(device_t dev) for (i=0; i<= 0xf; i++) { outb((i<<4), xbus_index + PC87417_HAP0); } - return; -} + return; +} diff --git a/src/superio/nsc/pc87417/pc87417_early_serial.c b/src/superio/nsc/pc87417/pc87417_early_serial.c index cb91d21296c7..78cf9b48bfeb 100644 --- a/src/superio/nsc/pc87417/pc87417_early_serial.c +++ b/src/superio/nsc/pc87417/pc87417_early_serial.c @@ -1,7 +1,28 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan by yhlu + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <arch/romcc_io.h> #include "pc87417.h" - static void pc87417_enable_serial(device_t dev, unsigned iobase) { pnp_set_logical_device(dev); @@ -9,8 +30,9 @@ static void pc87417_enable_serial(device_t dev, unsigned iobase) pnp_set_iobase(dev, PNP_IDX_IO0, iobase); pnp_set_enable(dev, 1); } + static void pc87417_enable_dev(device_t dev) { - pnp_set_logical_device(dev); - pnp_set_enable(dev, 1); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 1); } diff --git a/src/superio/nsc/pc87417/superio.c b/src/superio/nsc/pc87417/superio.c index 965fbd0d4188..9af09f927c59 100644 --- a/src/superio/nsc/pc87417/superio.c +++ b/src/superio/nsc/pc87417/superio.c @@ -1,8 +1,24 @@ -/* Copyright 2000 AG Electronics Ltd. */ -/* Copyright 2003-2004 Linux Networx */ -/* Copyright 2005 Tyan */ -/* By yhlu */ -/* This code is distributed without warranty under the GPL v2 (see COPYING) */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan by yhlu + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ #include <arch/io.h> #include <device/device.h> @@ -28,7 +44,7 @@ static void init(device_t dev) } conf = dev->chip_info; switch(dev->path.pnp.device) { - case PC87417_SP1: + case PC87417_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); break; @@ -53,19 +69,18 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, PC87417_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, }, - { &ops, PC87417_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, }, - { &ops, PC87417_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, - { &ops, PC87417_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, PC87417_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, }, - { &ops, PC87417_KBCM, PNP_IRQ0 }, - { &ops, PC87417_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, - { &ops, PC87417_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, - { &ops, PC87417_XBUS, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } }, - { &ops, PC87417_RTC, PNP_IO0 | PNP_IO1, { 0xfffe, 0 }, {0xfffe, 0x4} }, + { &ops, PC87417_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, }, + { &ops, PC87417_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, }, + { &ops, PC87417_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, + { &ops, PC87417_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, PC87417_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, }, + { &ops, PC87417_KBCM, PNP_IRQ0 }, + { &ops, PC87417_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, + { &ops, PC87417_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, + { &ops, PC87417_XBUS, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } }, + { &ops, PC87417_RTC, PNP_IO0 | PNP_IO1, { 0xfffe, 0 }, {0xfffe, 0x4} }, }; - static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &pnp_ops, diff --git a/src/superio/nsc/pc87427/Config.lb b/src/superio/nsc/pc87427/Config.lb index f62a567d6147..df9204e4bd44 100644 --- a/src/superio/nsc/pc87427/Config.lb +++ b/src/superio/nsc/pc87427/Config.lb @@ -1,2 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + config chip.h object superio.o diff --git a/src/superio/nsc/pc87427/Makefile.inc b/src/superio/nsc/pc87427/Makefile.inc index 27c10ee88264..62c5aa543bc2 100644 --- a/src/superio/nsc/pc87427/Makefile.inc +++ b/src/superio/nsc/pc87427/Makefile.inc @@ -1,2 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_NSC_PC87427) += superio.o diff --git a/src/superio/nsc/pc87427/chip.h b/src/superio/nsc/pc87427/chip.h index 8eaf13570243..bc6afcdffcd2 100644 --- a/src/superio/nsc/pc87427/chip.h +++ b/src/superio/nsc/pc87427/chip.h @@ -1,3 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + extern struct chip_operations superio_nsc_pc87427_ops; #include <pc80/keyboard.h> diff --git a/src/superio/nsc/pc87427/pc87427.h b/src/superio/nsc/pc87427/pc87427.h index d998bd6c2049..304c9f7f9c98 100644 --- a/src/superio/nsc/pc87427/pc87427.h +++ b/src/superio/nsc/pc87427/pc87427.h @@ -13,7 +13,7 @@ #define PC87427_GPIO_DEV PNP_DEV(0x2e, PC87427_GPIO) /* This is to get around a romcc bug */ -//#define PC87427_XBUS_DEV PNP_DEV(0x2e, PC87427_XBUS) +/* #define PC87427_XBUS_DEV PNP_DEV(0x2e, PC87427_XBUS) */ #define PC87427_XBUS_DEV PNP_DEV(0x2e, 0x0f) #define PC87427_GPSEL 0xf0 diff --git a/src/superio/nsc/pc87427/pc87427_early_init.c b/src/superio/nsc/pc87427/pc87427_early_init.c index 71f702f11f51..bbb140d57c2e 100644 --- a/src/superio/nsc/pc87427/pc87427_early_init.c +++ b/src/superio/nsc/pc87427/pc87427_early_init.c @@ -1,3 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <arch/romcc_io.h> #include "pc87427.h" @@ -27,5 +48,5 @@ static void xbus_cfg(device_t dev) for (i=0; i<= 0xf; i++) { outb((i<<4), xbus_index + PC87427_HAP0); } - return; -} + return; +} diff --git a/src/superio/nsc/pc87427/superio.c b/src/superio/nsc/pc87427/superio.c index 089392d3f9a7..e8ffe2a09fc9 100644 --- a/src/superio/nsc/pc87427/superio.c +++ b/src/superio/nsc/pc87427/superio.c @@ -1,6 +1,23 @@ -/* Copyright 2000 AG Electronics Ltd. */ -/* Copyright 2003-2004 Linux Networx */ -/* This code is distributed without warranty under the GPL v2 (see COPYING) */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ #include <arch/io.h> #include <device/device.h> @@ -12,7 +29,6 @@ #include "chip.h" #include "pc87427.h" - static void init(device_t dev) { struct superio_nsc_pc87427_config *conf; @@ -25,7 +41,7 @@ static void init(device_t dev) } conf = dev->chip_info; switch(dev->path.pnp.device) { - case PC87427_SP1: + case PC87427_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); break; @@ -50,26 +66,25 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, PC87427_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, }, - { &ops, PC87427_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, PC87427_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, PC87427_SWC, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 | PNP_IRQ0, - { 0xfff0, 0 }, { 0xfffc, 0 }, { 0xfffc, 0 }, { 0xfff8, 0 } }, - { &ops, PC87427_KBCM, PNP_IRQ0 }, - { &ops, PC87427_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, - { &ops, PC87427_GPIO, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } }, - { &ops, PC87427_WDT, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 } }, - { &ops, PC87427_FMC, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } }, - { &ops, PC87427_XBUS, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } }, - { &ops, PC87427_RTC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xfffe, 0 }, { 0xfffe, 0 } }, - { &ops, PC87427_MHC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffe0, 0 }, { 0xffe0, 0 } }, + { &ops, PC87427_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, }, + { &ops, PC87427_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, PC87427_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, PC87427_SWC, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 | PNP_IRQ0, + { 0xfff0, 0 }, { 0xfffc, 0 }, { 0xfffc, 0 }, { 0xfff8, 0 } }, + { &ops, PC87427_KBCM, PNP_IRQ0 }, + { &ops, PC87427_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, + { &ops, PC87427_GPIO, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } }, + { &ops, PC87427_WDT, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 } }, + { &ops, PC87427_FMC, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } }, + { &ops, PC87427_XBUS, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } }, + { &ops, PC87427_RTC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xfffe, 0 }, { 0xfffe, 0 } }, + { &ops, PC87427_MHC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffe0, 0 }, { 0xffe0, 0 } }, }; - static void enable_dev(struct device *dev) { pnp_enable_devices(dev, &ops, - ARRAY_SIZE(pnp_dev_info), pnp_dev_info); + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); } struct chip_operations superio_nsc_pc87427_ops = { diff --git a/src/superio/nsc/pc97307/Config.lb b/src/superio/nsc/pc97307/Config.lb index 94a888e7678f..5e255016e07c 100644 --- a/src/superio/nsc/pc97307/Config.lb +++ b/src/superio/nsc/pc97307/Config.lb @@ -1,2 +1,22 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + config chip.h object superio.c diff --git a/src/superio/nsc/pc97307/Makefile.inc b/src/superio/nsc/pc97307/Makefile.inc index 40d962f0e483..a601ab17e46d 100644 --- a/src/superio/nsc/pc97307/Makefile.inc +++ b/src/superio/nsc/pc97307/Makefile.inc @@ -1,2 +1,22 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_NSC_PC97307) += superio.o diff --git a/src/superio/nsc/pc97307/chip.h b/src/superio/nsc/pc97307/chip.h index 3e6b7f64ad64..efc5bb899414 100644 --- a/src/superio/nsc/pc97307/chip.h +++ b/src/superio/nsc/pc97307/chip.h @@ -1,3 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #ifndef _SUPERIO_NSC_PC97307 #define _SUPERIO_NSC_PC97307 diff --git a/src/superio/nsc/pc97307/pc97307.h b/src/superio/nsc/pc97307/pc97307.h index fa1f7f69b5b3..e917d9ce4f91 100644 --- a/src/superio/nsc/pc97307/pc97307.h +++ b/src/superio/nsc/pc97307/pc97307.h @@ -1,3 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #define PC97307_KBCK 0x00 /* Keyboard */ #define PC97307_KBCM 0x01 /* Mouse */ #define PC97307_RTC 0x02 /* Real-Time Clock */ diff --git a/src/superio/nsc/pc97307/superio.c b/src/superio/nsc/pc97307/superio.c index 1e4d6d6aae01..45dcbc9bdcc3 100644 --- a/src/superio/nsc/pc97307/superio.c +++ b/src/superio/nsc/pc97307/superio.c @@ -1,5 +1,22 @@ -/* Copyright 2000 AG Electronics Ltd. */ -/* This code is distributed without warranty under the GPL v2 (see COPYING) */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ #include <arch/io.h> #include <console/console.h> @@ -66,15 +83,15 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, PC97307_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, }, - { &ops, PC97307_KBCM, PNP_IRQ0 }, - { &ops, PC97307_RTC, PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, }, - { &ops, PC97307_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, }, - { &ops, PC97307_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, }, - { &ops, PC97307_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, }, - { &ops, PC97307_SP1, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, }, - { &ops, PC97307_GPIO, PNP_IO0, { 0xfff8, 0 } }, - { &ops, PC97307_PM, PNP_IO0, { 0xfffe, 0 } }, + { &ops, PC97307_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, }, + { &ops, PC97307_KBCM, PNP_IRQ0 }, + { &ops, PC97307_RTC, PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, }, + { &ops, PC97307_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, }, + { &ops, PC97307_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, }, + { &ops, PC97307_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, }, + { &ops, PC97307_SP1, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, }, + { &ops, PC97307_GPIO, PNP_IO0, { 0xfff8, 0 } }, + { &ops, PC97307_PM, PNP_IO0, { 0xfffe, 0 } }, }; static void enable_dev(struct device *dev) diff --git a/src/superio/nsc/pc97317/Config.lb b/src/superio/nsc/pc97317/Config.lb index 94a888e7678f..5e255016e07c 100644 --- a/src/superio/nsc/pc97317/Config.lb +++ b/src/superio/nsc/pc97317/Config.lb @@ -1,2 +1,22 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + config chip.h object superio.c diff --git a/src/superio/nsc/pc97317/Makefile.inc b/src/superio/nsc/pc97317/Makefile.inc index d77f0c22f76f..cf5fc6bb34a1 100644 --- a/src/superio/nsc/pc97317/Makefile.inc +++ b/src/superio/nsc/pc97317/Makefile.inc @@ -1,2 +1,22 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_NSC_PC97317) += superio.o diff --git a/src/superio/nsc/pc97317/chip.h b/src/superio/nsc/pc97317/chip.h index 7997dff8bc03..84962824820f 100644 --- a/src/superio/nsc/pc97317/chip.h +++ b/src/superio/nsc/pc97317/chip.h @@ -1,3 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #ifndef _SUPERIO_NSC_PC97317 #define _SUPERIO_NSC_PC97317 @@ -17,4 +37,5 @@ struct superio_nsc_pc97317_config { struct uart8250 com1, com2; struct pc_keyboard keyboard; }; + #endif /* _SUPERIO_NSC_PC97317 */ diff --git a/src/superio/nsc/pc97317/pc97317.h b/src/superio/nsc/pc97317/pc97317.h index cdeca2aceadb..29339f119c36 100644 --- a/src/superio/nsc/pc97317/pc97317.h +++ b/src/superio/nsc/pc97317/pc97317.h @@ -1,3 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #define PC97317_KBCK 0x00 /* Keyboard */ #define PC97317_KBCM 0x01 /* Mouse */ #define PC97317_RTC 0x02 /* Real-Time Clock */ @@ -7,4 +27,3 @@ #define PC97317_SP1 0x06 /* Com1 */ #define PC97317_GPIO 0x07 #define PC97317_PM 0x08 /* Power Management */ - diff --git a/src/superio/nsc/pc97317/pc97317_early_serial.c b/src/superio/nsc/pc97317/pc97317_early_serial.c index 3aa7f9989079..c538fa8071a9 100644 --- a/src/superio/nsc/pc97317/pc97317_early_serial.c +++ b/src/superio/nsc/pc97317/pc97317_early_serial.c @@ -1,3 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <arch/romcc_io.h> #include "pc97317.h" @@ -19,7 +39,7 @@ static void pc97317_enable_serial(device_t dev, unsigned iobase) outb(0x03, PM_BASE); outb(inb(PM_BASE + 1) | 0x07, PM_BASE + 1); - + /* Wait for the clock to stabilise */ while(!inb(PM_BASE + 1 & 0x80)) ; diff --git a/src/superio/nsc/pc97317/superio.c b/src/superio/nsc/pc97317/superio.c index 30c819a773d6..969698d600e4 100644 --- a/src/superio/nsc/pc97317/superio.c +++ b/src/superio/nsc/pc97317/superio.c @@ -1,5 +1,22 @@ -/* Copyright 2000 AG Electronics Ltd. */ -/* This code is distributed without warranty under the GPL v2 (see COPYING) */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ #include <arch/io.h> #include <console/console.h> @@ -68,15 +85,15 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, PC97317_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, }, - { &ops, PC97317_KBCM, PNP_IRQ0 }, - { &ops, PC97317_RTC, PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, }, - { &ops, PC97317_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, }, - { &ops, PC97317_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, }, - { &ops, PC97317_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, }, - { &ops, PC97317_SP1, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, }, - { &ops, PC97317_GPIO, PNP_IO0, { 0xfff8, 0 } }, - { &ops, PC97317_PM, PNP_IO0, { 0xfffe, 0 } }, + { &ops, PC97317_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, }, + { &ops, PC97317_KBCM, PNP_IRQ0 }, + { &ops, PC97317_RTC, PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, }, + { &ops, PC97317_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, }, + { &ops, PC97317_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, }, + { &ops, PC97317_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, }, + { &ops, PC97317_SP1, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, }, + { &ops, PC97317_GPIO, PNP_IO0, { 0xfff8, 0 } }, + { &ops, PC97317_PM, PNP_IO0, { 0xfffe, 0 } }, }; static void enable_dev(struct device *dev) diff --git a/src/superio/smsc/fdc37m60x/Config.lb b/src/superio/smsc/fdc37m60x/Config.lb index e1290e2fad0b..8e91c171ceee 100644 --- a/src/superio/smsc/fdc37m60x/Config.lb +++ b/src/superio/smsc/fdc37m60x/Config.lb @@ -20,4 +20,3 @@ config chip.h object superio.o - diff --git a/src/superio/smsc/fdc37m60x/Makefile.inc b/src/superio/smsc/fdc37m60x/Makefile.inc index 2ba5572bcc61..3d7144a139b8 100644 --- a/src/superio/smsc/fdc37m60x/Makefile.inc +++ b/src/superio/smsc/fdc37m60x/Makefile.inc @@ -20,4 +20,3 @@ #config chip.h obj-$(CONFIG_SUPERIO_SMSC_FDC37M60X) += superio.o - diff --git a/src/superio/smsc/fdc37m60x/chip.h b/src/superio/smsc/fdc37m60x/chip.h index cf91ff88a918..d4da77bf1324 100644 --- a/src/superio/smsc/fdc37m60x/chip.h +++ b/src/superio/smsc/fdc37m60x/chip.h @@ -33,4 +33,3 @@ struct superio_smsc_fdc37m60x_config { }; #endif /* _SUPERIO_SMSC_FDC37M60X */ - diff --git a/src/superio/smsc/fdc37m60x/fdc37m60x.h b/src/superio/smsc/fdc37m60x/fdc37m60x.h index 459b5b921e68..3424faf903ee 100644 --- a/src/superio/smsc/fdc37m60x/fdc37m60x.h +++ b/src/superio/smsc/fdc37m60x/fdc37m60x.h @@ -36,4 +36,3 @@ #define FDC37M60X_SP2 0x05 /* Com2 */ #define FDC37M60X_KBCK 0x07 /* Keyboard */ #define FDC37M60X_AUX 0x08 /* Auxiliary I/O */ - diff --git a/src/superio/smsc/fdc37m60x/fdc37m60x_early_serial.c b/src/superio/smsc/fdc37m60x/fdc37m60x_early_serial.c index 739f308299e9..1c1d334b627f 100644 --- a/src/superio/smsc/fdc37m60x/fdc37m60x_early_serial.c +++ b/src/superio/smsc/fdc37m60x/fdc37m60x_early_serial.c @@ -75,4 +75,3 @@ static void fdc37m60x_enable_serial(device_t dev, unsigned iobase) /* (3) Exit the configuration state. */ outb(0xaa, FDC37M60X_CONFIGURATION_PORT); } - diff --git a/src/superio/smsc/fdc37m60x/superio.c b/src/superio/smsc/fdc37m60x/superio.c index 54225162c5ce..1e595c6c8afd 100644 --- a/src/superio/smsc/fdc37m60x/superio.c +++ b/src/superio/smsc/fdc37m60x/superio.c @@ -70,9 +70,9 @@ static struct device_operations ops = { /* TODO: FDC, PP, AUX. */ static struct pnp_info pnp_dev_info[] = { - { &ops, FDC37M60X_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, FDC37M60X_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, - { &ops, FDC37M60X_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, + { &ops, FDC37M60X_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, FDC37M60X_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, + { &ops, FDC37M60X_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, }; static void enable_dev(struct device *dev) @@ -85,4 +85,3 @@ struct chip_operations superio_smsc_fdc37m60x_ops = { CHIP_NAME("SMSC FDC37M60X Super I/O") .enable_dev = enable_dev, }; - diff --git a/src/superio/smsc/lpc47b272/Config.lb b/src/superio/smsc/lpc47b272/Config.lb index cb1e9fb6b2f3..5a15d159ae75 100644 --- a/src/superio/smsc/lpc47b272/Config.lb +++ b/src/superio/smsc/lpc47b272/Config.lb @@ -20,4 +20,3 @@ config chip.h object superio.o - diff --git a/src/superio/smsc/lpc47b272/Makefile.inc b/src/superio/smsc/lpc47b272/Makefile.inc index c836e3537eff..c9332aa42b19 100644 --- a/src/superio/smsc/lpc47b272/Makefile.inc +++ b/src/superio/smsc/lpc47b272/Makefile.inc @@ -20,4 +20,3 @@ #config chip.h obj-$(CONFIG_SUPERIO_SMSC_LPC47B272) += superio.o - diff --git a/src/superio/smsc/lpc47b272/lpc47b272.h b/src/superio/smsc/lpc47b272/lpc47b272.h index c7016d9beccf..98639de88b47 100644 --- a/src/superio/smsc/lpc47b272/lpc47b272.h +++ b/src/superio/smsc/lpc47b272/lpc47b272.h @@ -26,4 +26,3 @@ #define LPC47B272_RT 10 /* Runtime reg*/ #define LPC47B272_MAX_CONFIG_REGISTER 0x5F - diff --git a/src/superio/smsc/lpc47b272/lpc47b272_early_serial.c b/src/superio/smsc/lpc47b272/lpc47b272_early_serial.c index 71641e9ff839..c1f15bf25ea4 100644 --- a/src/superio/smsc/lpc47b272/lpc47b272_early_serial.c +++ b/src/superio/smsc/lpc47b272/lpc47b272_early_serial.c @@ -23,37 +23,39 @@ #include <arch/romcc_io.h> #include "lpc47b272.h" -//---------------------------------------------------------------------------------- -// Function: pnp_enter_conf_state -// Parameters: dev - high 8 bits = Super I/O port -// Return Value: None -// Description: Enable access to the LPC47B272's configuration registers. -// -static inline void pnp_enter_conf_state(device_t dev) { +/* + * Function: pnp_enter_conf_state + * Parameters: dev - high 8 bits = Super I/O port + * Return Value: None + * Description: Enable access to the LPC47B272's configuration registers. + */ +static inline void pnp_enter_conf_state(device_t dev) +{ unsigned port = dev>>8; - outb(0x55, port); + outb(0x55, port); } -//---------------------------------------------------------------------------------- -// Function: pnp_exit_conf_state -// Parameters: dev - high 8 bits = Super I/O port -// Return Value: None -// Description: Disable access to the LPC47B272's configuration registers. -// -static void pnp_exit_conf_state(device_t dev) { +/* + * Function: pnp_exit_conf_state + * Parameters: dev - high 8 bits = Super I/O port + * Return Value: None + * Description: Disable access to the LPC47B272's configuration registers. + */ +static void pnp_exit_conf_state(device_t dev) +{ unsigned port = dev>>8; - outb(0xaa, port); + outb(0xaa, port); } -//---------------------------------------------------------------------------------- -// Function: lpc47b272_enable_serial -// Parameters: dev - high 8 bits = Super I/O port, -// low 8 bits = logical device number (per lpc47b272.h) -// iobase - processor I/O port address to assign to this serial device -// Return Value: bool -// Description: Configure the base I/O port of the specified serial device -// and enable the serial device. -// +/* + * Function: lpc47b272_enable_serial + * Parameters: dev - high 8 bits = Super I/O port, + * low 8 bits = logical device number (per lpc47b272.h) + * iobase - processor I/O port address to assign to this serial device + * Return Value: bool + * Description: Configure the base I/O port of the specified serial device + * and enable the serial device. + */ static void lpc47b272_enable_serial(device_t dev, unsigned iobase) { pnp_enter_conf_state(dev); diff --git a/src/superio/smsc/lpc47b272/superio.c b/src/superio/smsc/lpc47b272/superio.c index 1a6a77853765..93b39a370ef3 100644 --- a/src/superio/smsc/lpc47b272/superio.c +++ b/src/superio/smsc/lpc47b272/superio.c @@ -3,7 +3,7 @@ * * Copyright (C) 2000 AG Electronics Ltd. * Copyright (C) 2003-2004 Linux Networx - * Copyright (C) 2004 Tyan + * Copyright (C) 2004 Tyan * Copyright (C) 2005 Digital Design Corporation * * This program is free software; you can redistribute it and/or modify @@ -36,7 +36,7 @@ #include "chip.h" #include "lpc47b272.h" -// Forward declarations +/* Forward declarations */ static void enable_dev(device_t dev); static void lpc47b272_pnp_set_resources(device_t dev); static void lpc47b272_pnp_enable_resources(device_t dev); @@ -47,7 +47,6 @@ static void pnp_enter_conf_state(device_t dev); static void pnp_exit_conf_state(device_t dev); static void dump_pnp_device(device_t dev); - struct chip_operations superio_smsc_lpc47b272_ops = { CHIP_NAME("SMSC LPC47B272 Super I/O") .enable_dev = enable_dev @@ -62,56 +61,56 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, LPC47B272_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, LPC47B272_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, LPC47B272_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, LPC47B272_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, LPC47B272_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, - { &ops, LPC47B272_RT, PNP_IO0, { 0x780, 0 }, }, + { &ops, LPC47B272_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, LPC47B272_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, LPC47B272_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, LPC47B272_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, LPC47B272_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, + { &ops, LPC47B272_RT, PNP_IO0, { 0x780, 0 }, }, }; /**********************************************************************************/ -/* PUBLIC INTERFACE */ +/* PUBLIC INTERFACE */ /**********************************************************************************/ -//---------------------------------------------------------------------------------- -// Function: enable_dev -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Create device structures and allocate resources to devices -// specified in the pnp_dev_info array (above). -// +/* + * Function: enable_dev + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Create device structures and allocate resources to devices + * specified in the pnp_dev_info array (above). + */ static void enable_dev(device_t dev) { - pnp_enable_devices(dev, &pnp_ops, - ARRAY_SIZE(pnp_dev_info), - pnp_dev_info); + pnp_enable_devices(dev, &pnp_ops, + ARRAY_SIZE(pnp_dev_info), + pnp_dev_info); } -//---------------------------------------------------------------------------------- -// Function: lpc47b272_pnp_set_resources -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Configure the specified Super I/O device with the resources -// (I/O space, etc.) that have been allocated for it. -// +/* + * Function: lpc47b272_pnp_set_resources + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Configure the specified Super I/O device with the resources + * (I/O space, etc.) that have been allocated for it. + */ static void lpc47b272_pnp_set_resources(device_t dev) { - pnp_enter_conf_state(dev); + pnp_enter_conf_state(dev); pnp_set_resources(dev); - pnp_exit_conf_state(dev); -} + pnp_exit_conf_state(dev); +} static void lpc47b272_pnp_enable_resources(device_t dev) -{ +{ pnp_enter_conf_state(dev); - pnp_enable_resources(dev); - pnp_exit_conf_state(dev); + pnp_enable_resources(dev); + pnp_exit_conf_state(dev); } static void lpc47b272_pnp_enable(device_t dev) { - pnp_enter_conf_state(dev); + pnp_enter_conf_state(dev); pnp_set_logical_device(dev); if(dev->enabled) { @@ -120,17 +119,17 @@ static void lpc47b272_pnp_enable(device_t dev) else { pnp_set_enable(dev, 0); } - pnp_exit_conf_state(dev); + pnp_exit_conf_state(dev); } -//---------------------------------------------------------------------------------- -// Function: lpc47b272_init -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Initialize the specified Super I/O device. -// Devices other than COM ports and the keyboard controller are -// ignored. For COM ports, we configure the baud rate. -// +/* + * Function: lpc47b272_init + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Initialize the specified Super I/O device. + * Devices other than COM ports and the keyboard controller are + * ignored. For COM ports, we configure the baud rate. + */ static void lpc47b272_init(device_t dev) { struct superio_smsc_lpc47b272_config *conf = dev->chip_info; @@ -138,18 +137,18 @@ static void lpc47b272_init(device_t dev) if (!dev->enabled) return; - + switch(dev->path.pnp.device) { - case LPC47B272_SP1: + case LPC47B272_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); break; - + case LPC47B272_SP2: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com2); break; - + case LPC47B272_KBC: res0 = find_resource(dev, PNP_IDX_IO0); res1 = find_resource(dev, PNP_IDX_IO1); @@ -159,65 +158,65 @@ static void lpc47b272_init(device_t dev) } /**********************************************************************************/ -/* PRIVATE FUNCTIONS */ +/* PRIVATE FUNCTIONS */ /**********************************************************************************/ -//---------------------------------------------------------------------------------- -// Function: pnp_enter_conf_state -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Enable access to the LPC47B272's configuration registers. -// -static void pnp_enter_conf_state(device_t dev) +/* + * Function: pnp_enter_conf_state + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Enable access to the LPC47B272's configuration registers. + */ +static void pnp_enter_conf_state(device_t dev) { outb(0x55, dev->path.pnp.port); } -//---------------------------------------------------------------------------------- -// Function: pnp_exit_conf_state -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Disable access to the LPC47B272's configuration registers. -// -static void pnp_exit_conf_state(device_t dev) +/* + * Function: pnp_exit_conf_state + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Disable access to the LPC47B272's configuration registers. + */ +static void pnp_exit_conf_state(device_t dev) { - outb(0xaa, dev->path.pnp.port); + outb(0xaa, dev->path.pnp.port); } #if 0 -//---------------------------------------------------------------------------------- -// Function: dump_pnp_device -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Print the values of all of the LPC47B272's configuration registers. -// NOTE: The LPC47B272 must be in configuration mode when this -// function is called. -// +/* + * Function: dump_pnp_device + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Print the values of all of the LPC47B272's configuration registers. + * NOTE: The LPC47B272 must be in configuration mode when this + * function is called. + */ static void dump_pnp_device(device_t dev) { - int register_index; - print_debug("\r\n"); + int register_index; + print_debug("\r\n"); - for(register_index = 0; register_index <= LPC47B272_MAX_CONFIG_REGISTER; register_index++) { - uint8_t register_value; + for(register_index = 0; register_index <= LPC47B272_MAX_CONFIG_REGISTER; register_index++) { + uint8_t register_value; - if ((register_index & 0x0f) == 0) { - print_debug_hex8(register_index); - print_debug_char(':'); - } + if ((register_index & 0x0f) == 0) { + print_debug_hex8(register_index); + print_debug_char(':'); + } - // Skip over 'register' that would cause exit from configuration mode - if (register_index == 0xaa) + /* Skip over 'register' that would cause exit from configuration mode */ + if (register_index == 0xaa) register_value = 0xaa; else - register_value = pnp_read_config(dev, register_index); - - print_debug_char(' '); - print_debug_hex8(register_value); - if ((register_index & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } + register_value = pnp_read_config(dev, register_index); + + print_debug_char(' '); + print_debug_hex8(register_value); + if ((register_index & 0x0f) == 0x0f) { + print_debug("\r\n"); + } + } print_debug("\r\n"); } diff --git a/src/superio/smsc/lpc47b397/Config.lb b/src/superio/smsc/lpc47b397/Config.lb index f62a567d6147..699d2c4b3757 100644 --- a/src/superio/smsc/lpc47b397/Config.lb +++ b/src/superio/smsc/lpc47b397/Config.lb @@ -1,2 +1,24 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## Copyright (C) 2004 Tyan +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + config chip.h object superio.o diff --git a/src/superio/smsc/lpc47b397/Makefile.inc b/src/superio/smsc/lpc47b397/Makefile.inc index 79145f26972a..ee66fa1204b6 100644 --- a/src/superio/smsc/lpc47b397/Makefile.inc +++ b/src/superio/smsc/lpc47b397/Makefile.inc @@ -1,2 +1,24 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## Copyright (C) 2004 Tyan +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_SMSC_LPC47B397) += superio.o diff --git a/src/superio/smsc/lpc47b397/chip.h b/src/superio/smsc/lpc47b397/chip.h index 4f6a06781f2f..321fd898f12b 100644 --- a/src/superio/smsc/lpc47b397/chip.h +++ b/src/superio/smsc/lpc47b397/chip.h @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + struct chip_operations; extern struct chip_operations superio_smsc_lpc47b397_ops; diff --git a/src/superio/smsc/lpc47b397/lpc47b397.h b/src/superio/smsc/lpc47b397/lpc47b397.h index c166659dfe8b..91bad4730c10 100644 --- a/src/superio/smsc/lpc47b397/lpc47b397.h +++ b/src/superio/smsc/lpc47b397/lpc47b397.h @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #define LPC47B397_FDC 0 /* Floppy */ #define LPC47B397_PP 3 /* Parallel Port */ #define LPC47B397_SP1 4 /* Com1 */ diff --git a/src/superio/smsc/lpc47b397/lpc47b397_early_gpio.c b/src/superio/smsc/lpc47b397/lpc47b397_early_gpio.c index 1ded9545d4c2..8b09e09a100f 100644 --- a/src/superio/smsc/lpc47b397/lpc47b397_early_gpio.c +++ b/src/superio/smsc/lpc47b397/lpc47b397_early_gpio.c @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + static void lpc47b397_gpio_offset_out(unsigned iobase, unsigned offset, unsigned value) { outb(value,iobase+offset); @@ -8,7 +30,7 @@ static unsigned lpc47b397_gpio_offset_in(unsigned iobase, unsigned offset) return inb(iobase+offset); } -//for GP60-GP64, GP66-GP85 +/* for GP60-GP64, GP66-GP85 */ #define LPC47B397_GPIO_CNTL_INDEX 0x70 #define LPC47B397_GPIO_CNTL_DATA 0x71 @@ -23,4 +45,3 @@ static unsigned lpc47b397_gpio_index_in(unsigned iobase, unsigned index) outb(index,iobase+LPC47B397_GPIO_CNTL_INDEX); return inb(iobase+LPC47B397_GPIO_CNTL_DATA); } - diff --git a/src/superio/smsc/lpc47b397/lpc47b397_early_serial.c b/src/superio/smsc/lpc47b397/lpc47b397_early_serial.c index fb656266069a..e81b6a00407d 100644 --- a/src/superio/smsc/lpc47b397/lpc47b397_early_serial.c +++ b/src/superio/smsc/lpc47b397/lpc47b397_early_serial.c @@ -1,12 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <arch/romcc_io.h> #include "lpc47b397.h" -static inline void pnp_enter_conf_state(device_t dev) { +static inline void pnp_enter_conf_state(device_t dev) +{ unsigned port = dev>>8; outb(0x55, port); } -static void pnp_exit_conf_state(device_t dev) { +static void pnp_exit_conf_state(device_t dev) +{ unsigned port = dev>>8; outb(0xaa, port); } diff --git a/src/superio/smsc/lpc47b397/superio.c b/src/superio/smsc/lpc47b397/superio.c index 1849102dd10f..0fbe048a8fa3 100644 --- a/src/superio/smsc/lpc47b397/superio.c +++ b/src/superio/smsc/lpc47b397/superio.c @@ -1,10 +1,25 @@ -/* Copyright 2000 AG Electronics Ltd. */ -/* Copyright 2003-2004 Linux Networx */ -/* Copyright 2004 Tyan +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -/* This code is distributed without warranty under the GPL v2 (see COPYING) */ - #include <arch/io.h> #include <device/device.h> #include <device/pnp.h> @@ -18,11 +33,12 @@ #include "chip.h" #include "lpc47b397.h" - -static void pnp_enter_conf_state(device_t dev) { +static void pnp_enter_conf_state(device_t dev) +{ outb(0x55, dev->path.pnp.port); } -static void pnp_exit_conf_state(device_t dev) { +static void pnp_exit_conf_state(device_t dev) +{ outb(0xaa, dev->path.pnp.port); } @@ -38,7 +54,8 @@ static uint8_t pnp_read_index(unsigned long port_base, uint8_t reg) return inb(port_base + 1); } -static void enable_hwm_smbus(device_t dev) { +static void enable_hwm_smbus(device_t dev) +{ /* enable SensorBus register access */ uint8_t reg, value; reg = 0xf0; @@ -47,7 +64,6 @@ static void enable_hwm_smbus(device_t dev) { pnp_write_config(dev, reg, value); } - static void lpc47b397_init(device_t dev) { struct superio_smsc_lpc47b397_config *conf; @@ -71,29 +87,21 @@ static void lpc47b397_init(device_t dev) init_pc_keyboard(res0->base, res1->base, &conf->keyboard); break; } - } static void lpc47b397_pnp_set_resources(device_t dev) { - pnp_enter_conf_state(dev); - pnp_set_resources(dev); - #if 0 dump_pnp_device(dev); #endif - pnp_exit_conf_state(dev); - } static void lpc47b397_pnp_enable_resources(device_t dev) { - pnp_enter_conf_state(dev); - pnp_enable_resources(dev); switch(dev->path.pnp.device) { @@ -103,20 +111,15 @@ static void lpc47b397_pnp_enable_resources(device_t dev) enable_hwm_smbus(dev); break; } - #if 0 dump_pnp_device(dev); #endif - pnp_exit_conf_state(dev); - } static void lpc47b397_pnp_enable(device_t dev) { - pnp_enter_conf_state(dev); - pnp_set_logical_device(dev); if(dev->enabled) { @@ -125,9 +128,7 @@ static void lpc47b397_pnp_enable(device_t dev) else { pnp_set_enable(dev, 0); } - pnp_exit_conf_state(dev); - } static struct device_operations ops = { @@ -138,7 +139,6 @@ static struct device_operations ops = { .init = lpc47b397_init, }; - #define HWM_INDEX 0 #define HWM_DATA 1 #define SB_INDEX 0x0b @@ -157,9 +157,9 @@ static int lsmbus_read_byte(device_t dev, uint8_t address) res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0); - pnp_write_index(res->base+HWM_INDEX, 0, device); // why 0? + pnp_write_index(res->base+HWM_INDEX, 0, device); /* why 0? */ - result = pnp_read_index(res->base+SB_INDEX, address); // we only read it one byte one time + result = pnp_read_index(res->base+SB_INDEX, address); /* we only read it one byte one time */ return result; } @@ -172,16 +172,16 @@ static int lsmbus_write_byte(device_t dev, uint8_t address, uint8_t val) device = dev->path.i2c.device; res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0); - pnp_write_index(res->base+HWM_INDEX, 0, device); // why 0? + pnp_write_index(res->base+HWM_INDEX, 0, device); /* why 0? */ - pnp_write_index(res->base+SB_INDEX, address, val); // we only write it one byte one time + pnp_write_index(res->base+SB_INDEX, address, val); /* we only write it one byte one time */ return 0; } static struct smbus_bus_operations lops_smbus_bus = { -// .recv_byte = lsmbus_recv_byte, -// .send_byte = lsmbus_send_byte, + /* .recv_byte = lsmbus_recv_byte, */ + /* .send_byte = lsmbus_send_byte, */ .read_byte = lsmbus_read_byte, .write_byte = lsmbus_write_byte, }; @@ -215,4 +215,3 @@ struct chip_operations superio_smsc_lpc47b397_ops = { CHIP_NAME("SMSC LPC47B397 Super I/O") .enable_dev = enable_dev, }; - diff --git a/src/superio/smsc/lpc47m10x/Config.lb b/src/superio/smsc/lpc47m10x/Config.lb index f62a567d6147..3ac7b52764dc 100644 --- a/src/superio/smsc/lpc47m10x/Config.lb +++ b/src/superio/smsc/lpc47m10x/Config.lb @@ -1,2 +1,26 @@ +## +## superio.c: RAM driver for SMSC LPC47M10X2 Super I/O chip +## +## Copyright 2000 AG Electronics Ltd. +## Copyright 2003-2004 Linux Networx +## Copyright 2004 Tyan +## Copyright (C) 2005 Digital Design Corporation +## Copyright (C) Ron Minnich, LANL +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + config chip.h object superio.o diff --git a/src/superio/smsc/lpc47m10x/Makefile.inc b/src/superio/smsc/lpc47m10x/Makefile.inc index 8a51d63445ed..71fd06e23ae1 100644 --- a/src/superio/smsc/lpc47m10x/Makefile.inc +++ b/src/superio/smsc/lpc47m10x/Makefile.inc @@ -1,2 +1,26 @@ +## +## superio.c: RAM driver for SMSC LPC47M10X2 Super I/O chip +## +## Copyright 2000 AG Electronics Ltd. +## Copyright 2003-2004 Linux Networx +## Copyright 2004 Tyan +## Copyright (C) 2005 Digital Design Corporation +## Copyright (C) Ron Minnich, LANL +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_SMSC_LPC47M10X) += superio.o diff --git a/src/superio/smsc/lpc47m10x/chip.h b/src/superio/smsc/lpc47m10x/chip.h index ce63a53a2845..57a8405dc519 100644 --- a/src/superio/smsc/lpc47m10x/chip.h +++ b/src/superio/smsc/lpc47m10x/chip.h @@ -1,3 +1,27 @@ +/* + * superio.c: RAM driver for SMSC LPC47M10X2 Super I/O chip + * + * Copyright 2000 AG Electronics Ltd. + * Copyright 2003-2004 Linux Networx + * Copyright 2004 Tyan + * Copyright (C) 2005 Digital Design Corporation + * Copyright (C) Ron Minnich, LANL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + struct chip_operations; extern struct chip_operations superio_smsc_lpc47m10x_ops; diff --git a/src/superio/smsc/lpc47m10x/lpc47m10x.h b/src/superio/smsc/lpc47m10x/lpc47m10x.h index 9f798713b508..0f9486d6006a 100644 --- a/src/superio/smsc/lpc47m10x/lpc47m10x.h +++ b/src/superio/smsc/lpc47m10x/lpc47m10x.h @@ -1,3 +1,27 @@ +/* + * superio.c: RAM driver for SMSC LPC47M10X2 Super I/O chip + * + * Copyright 2000 AG Electronics Ltd. + * Copyright 2003-2004 Linux Networx + * Copyright 2004 Tyan + * Copyright (C) 2005 Digital Design Corporation + * Copyright (C) Ron Minnich, LANL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #define LPC47M10X2_FDC 0 /* Floppy */ #define LPC47M10X2_PP 3 /* Parallel Port */ #define LPC47M10X2_SP1 4 /* Com1 */ diff --git a/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c b/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c index 70f7b2017446..3d17d2d5cd6c 100644 --- a/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c +++ b/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c @@ -22,37 +22,39 @@ #include <arch/romcc_io.h> #include "lpc47m10x.h" -//---------------------------------------------------------------------------------- -// Function: pnp_enter_conf_state -// Parameters: dev - high 8 bits = Super I/O port -// Return Value: None -// Description: Enable access to the LPC47M10X2's configuration registers. -// -static inline void pnp_enter_conf_state(device_t dev) { +/* + * Function: pnp_enter_conf_state + * Parameters: dev - high 8 bits = Super I/O port + * Return Value: None + * Description: Enable access to the LPC47M10X2's configuration registers. + */ +static inline void pnp_enter_conf_state(device_t dev) +{ unsigned port = dev>>8; - outb(0x55, port); + outb(0x55, port); } -//---------------------------------------------------------------------------------- -// Function: pnp_exit_conf_state -// Parameters: dev - high 8 bits = Super I/O port -// Return Value: None -// Description: Disable access to the LPC47M10X2's configuration registers. -// -static void pnp_exit_conf_state(device_t dev) { +/* + * Function: pnp_exit_conf_state + * Parameters: dev - high 8 bits = Super I/O port + * Return Value: None + * Description: Disable access to the LPC47M10X2's configuration registers. + */ +static void pnp_exit_conf_state(device_t dev) +{ unsigned port = dev>>8; - outb(0xaa, port); + outb(0xaa, port); } -//---------------------------------------------------------------------------------- -// Function: lpc47b272_enable_serial -// Parameters: dev - high 8 bits = Super I/O port, -// low 8 bits = logical device number (per lpc47b272.h) -// iobase - processor I/O port address to assign to this serial device -// Return Value: bool -// Description: Configure the base I/O port of the specified serial device -// and enable the serial device. -// +/* + * Function: lpc47b272_enable_serial + * Parameters: dev - high 8 bits = Super I/O port, + * low 8 bits = logical device number (per lpc47b272.h) + * iobase - processor I/O port address to assign to this serial device + * Return Value: bool + * Description: Configure the base I/O port of the specified serial device + * and enable the serial device. + */ static void lpc47b272_enable_serial(device_t dev, unsigned iobase) { pnp_enter_conf_state(dev); diff --git a/src/superio/smsc/lpc47m10x/superio.c b/src/superio/smsc/lpc47m10x/superio.c index 5bcb08dd2638..535dc394b681 100644 --- a/src/superio/smsc/lpc47m10x/superio.c +++ b/src/superio/smsc/lpc47m10x/superio.c @@ -3,7 +3,7 @@ * * Copyright 2000 AG Electronics Ltd. * Copyright 2003-2004 Linux Networx - * Copyright 2004 Tyan + * Copyright 2004 Tyan * Copyright (C) 2005 Digital Design Corporation * Copyright (C) Ron Minnich, LANL * @@ -35,7 +35,7 @@ #include "chip.h" #include "lpc47m10x.h" -// Forward declarations +/* Forward declarations */ static void enable_dev(device_t dev); static void lpc47m10x_pnp_set_resources(device_t dev); static void lpc47m10x_pnp_enable_resources(device_t dev); @@ -46,7 +46,6 @@ static void pnp_enter_conf_state(device_t dev); static void pnp_exit_conf_state(device_t dev); static void dump_pnp_device(device_t dev); - struct chip_operations superio_smsc_lpc47m10x_ops = { CHIP_NAME("SMSC LPC47M10x Super I/O") .enable_dev = enable_dev @@ -61,55 +60,55 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, LPC47M10X2_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, LPC47M10X2_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, LPC47M10X2_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, LPC47M10X2_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, LPC47M10X2_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, + { &ops, LPC47M10X2_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, LPC47M10X2_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, LPC47M10X2_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, LPC47M10X2_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, LPC47M10X2_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, }; /**********************************************************************************/ -/* PUBLIC INTERFACE */ +/* PUBLIC INTERFACE */ /**********************************************************************************/ -//---------------------------------------------------------------------------------- -// Function: enable_dev -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Create device structures and allocate resources to devices -// specified in the pnp_dev_info array (above). -// +/* + * Function: enable_dev + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Create device structures and allocate resources to devices + * specified in the pnp_dev_info array (above). + */ static void enable_dev(device_t dev) { - pnp_enable_devices(dev, &pnp_ops, - ARRAY_SIZE(pnp_dev_info), - pnp_dev_info); + pnp_enable_devices(dev, &pnp_ops, + ARRAY_SIZE(pnp_dev_info), + pnp_dev_info); } -//---------------------------------------------------------------------------------- -// Function: lpc47m10x_pnp_set_resources -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Configure the specified Super I/O device with the resources -// (I/O space, etc.) that have been allocated for it. -// +/* + * Function: lpc47m10x_pnp_set_resources + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Configure the specified Super I/O device with the resources + * (I/O space, etc.) that have been allocated for it. + */ static void lpc47m10x_pnp_set_resources(device_t dev) { - pnp_enter_conf_state(dev); + pnp_enter_conf_state(dev); pnp_set_resources(dev); - pnp_exit_conf_state(dev); -} + pnp_exit_conf_state(dev); +} static void lpc47m10x_pnp_enable_resources(device_t dev) -{ +{ pnp_enter_conf_state(dev); - pnp_enable_resources(dev); - pnp_exit_conf_state(dev); + pnp_enable_resources(dev); + pnp_exit_conf_state(dev); } static void lpc47m10x_pnp_enable(device_t dev) { - pnp_enter_conf_state(dev); + pnp_enter_conf_state(dev); pnp_set_logical_device(dev); if(dev->enabled) { @@ -118,17 +117,17 @@ static void lpc47m10x_pnp_enable(device_t dev) else { pnp_set_enable(dev, 0); } - pnp_exit_conf_state(dev); + pnp_exit_conf_state(dev); } -//---------------------------------------------------------------------------------- -// Function: lpc47m10x_init -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Initialize the specified Super I/O device. -// Devices other than COM ports and the keyboard controller are -// ignored. For COM ports, we configure the baud rate. -// +/* + * Function: lpc47m10x_init + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Initialize the specified Super I/O device. + * Devices other than COM ports and the keyboard controller are + * ignored. For COM ports, we configure the baud rate. + */ static void lpc47m10x_init(device_t dev) { struct superio_smsc_lpc47m10x_config *conf = dev->chip_info; @@ -136,18 +135,18 @@ static void lpc47m10x_init(device_t dev) if (!dev->enabled) return; - + switch(dev->path.pnp.device) { - case LPC47M10X2_SP1: + case LPC47M10X2_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); break; - + case LPC47M10X2_SP2: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com2); break; - + case LPC47M10X2_KBC: res0 = find_resource(dev, PNP_IDX_IO0); res1 = find_resource(dev, PNP_IDX_IO1); @@ -157,65 +156,65 @@ static void lpc47m10x_init(device_t dev) } /**********************************************************************************/ -/* PRIVATE FUNCTIONS */ +/* PRIVATE FUNCTIONS */ /**********************************************************************************/ -//---------------------------------------------------------------------------------- -// Function: pnp_enter_conf_state -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Enable access to the LPC47M10X2's configuration registers. -// -static void pnp_enter_conf_state(device_t dev) +/* + * Function: pnp_enter_conf_state + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Enable access to the LPC47M10X2's configuration registers. + */ +static void pnp_enter_conf_state(device_t dev) { outb(0x55, dev->path.pnp.port); } -//---------------------------------------------------------------------------------- -// Function: pnp_exit_conf_state -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Disable access to the LPC47M10X2's configuration registers. -// -static void pnp_exit_conf_state(device_t dev) +/* + * Function: pnp_exit_conf_state + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Disable access to the LPC47M10X2's configuration registers. + */ +static void pnp_exit_conf_state(device_t dev) { - outb(0xaa, dev->path.pnp.port); + outb(0xaa, dev->path.pnp.port); } #if 0 -//---------------------------------------------------------------------------------- -// Function: dump_pnp_device -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Print the values of all of the LPC47M10X2's configuration registers. -// NOTE: The LPC47M10X2 must be in configuration mode when this -// function is called. -// +/* + * Function: dump_pnp_device + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Print the values of all of the LPC47M10X2's configuration registers. + * NOTE: The LPC47M10X2 must be in configuration mode when this + * function is called. + */ static void dump_pnp_device(device_t dev) { - int register_index; - print_debug("\r\n"); + int register_index; + print_debug("\r\n"); - for(register_index = 0; register_index <= LPC47M10X2_MAX_CONFIG_REGISTER; register_index++) { - uint8_t register_value; + for(register_index = 0; register_index <= LPC47M10X2_MAX_CONFIG_REGISTER; register_index++) { + uint8_t register_value; - if ((register_index & 0x0f) == 0) { - print_debug_hex8(register_index); - print_debug_char(':'); - } + if ((register_index & 0x0f) == 0) { + print_debug_hex8(register_index); + print_debug_char(':'); + } - // Skip over 'register' that would cause exit from configuration mode - if (register_index == 0xaa) + /* Skip over 'register' that would cause exit from configuration mode */ + if (register_index == 0xaa) register_value = 0xaa; else - register_value = pnp_read_config(dev, register_index); - - print_debug_char(' '); - print_debug_hex8(register_value); - if ((register_index & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } + register_value = pnp_read_config(dev, register_index); + + print_debug_char(' '); + print_debug_hex8(register_value); + if ((register_index & 0x0f) == 0x0f) { + print_debug("\r\n"); + } + } print_debug("\r\n"); } diff --git a/src/superio/smsc/lpc47m15x/Makefile.inc b/src/superio/smsc/lpc47m15x/Makefile.inc index 25967e401369..37ee88ee0f1a 100644 --- a/src/superio/smsc/lpc47m15x/Makefile.inc +++ b/src/superio/smsc/lpc47m15x/Makefile.inc @@ -1,2 +1,21 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2009 coresystems GmbH +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_SMSC_LPC47M15X) += superio.o diff --git a/src/superio/smsc/lpc47m15x/lpc47m15x_early_serial.c b/src/superio/smsc/lpc47m15x/lpc47m15x_early_serial.c index 85ee7222d894..dda759731b1d 100644 --- a/src/superio/smsc/lpc47m15x/lpc47m15x_early_serial.c +++ b/src/superio/smsc/lpc47m15x/lpc47m15x_early_serial.c @@ -28,7 +28,8 @@ static inline void pnp_enter_conf_state(device_t dev) outb(0x55, port); } -static void pnp_exit_conf_state(device_t dev) { +static void pnp_exit_conf_state(device_t dev) +{ unsigned port = dev>>8; outb(0xaa, port); } diff --git a/src/superio/smsc/lpc47m15x/superio.c b/src/superio/smsc/lpc47m15x/superio.c index 6851279525d2..28bbcfdaf275 100644 --- a/src/superio/smsc/lpc47m15x/superio.c +++ b/src/superio/smsc/lpc47m15x/superio.c @@ -32,7 +32,7 @@ #include "chip.h" #include "lpc47m15x.h" -// Forward declarations +/* Forward declarations */ static void enable_dev(device_t dev); static void lpc47m15x_pnp_set_resources(device_t dev); static void lpc47m15x_pnp_enable_resources(device_t dev); @@ -43,7 +43,6 @@ static void pnp_enter_conf_state(device_t dev); static void pnp_exit_conf_state(device_t dev); static void dump_pnp_device(device_t dev); - struct chip_operations superio_smsc_lpc47m15x_ops = { CHIP_NAME("SMSC LPC47M15x/192/997 Super I/O") .enable_dev = enable_dev @@ -58,11 +57,11 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, LPC47M15X_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, LPC47M15X_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, LPC47M15X_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, LPC47M15X_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, LPC47M15X_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, + { &ops, LPC47M15X_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, LPC47M15X_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, LPC47M15X_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, LPC47M15X_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, LPC47M15X_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, }; static void enable_dev(device_t dev) @@ -72,13 +71,13 @@ static void enable_dev(device_t dev) static void lpc47m15x_pnp_set_resources(device_t dev) { - pnp_enter_conf_state(dev); + pnp_enter_conf_state(dev); pnp_set_resources(dev); - pnp_exit_conf_state(dev); -} + pnp_exit_conf_state(dev); +} static void lpc47m15x_pnp_enable_resources(device_t dev) -{ +{ pnp_enter_conf_state(dev); pnp_enable_resources(dev); pnp_exit_conf_state(dev); @@ -86,7 +85,7 @@ static void lpc47m15x_pnp_enable_resources(device_t dev) static void lpc47m15x_pnp_enable(device_t dev) { - pnp_enter_conf_state(dev); + pnp_enter_conf_state(dev); pnp_set_logical_device(dev); if(dev->enabled) { @@ -95,7 +94,7 @@ static void lpc47m15x_pnp_enable(device_t dev) else { pnp_set_enable(dev, 0); } - pnp_exit_conf_state(dev); + pnp_exit_conf_state(dev); } static void lpc47m15x_init(device_t dev) @@ -105,18 +104,18 @@ static void lpc47m15x_init(device_t dev) if (!dev->enabled) return; - + switch(dev->path.pnp.device) { - case LPC47M15X_SP1: + case LPC47M15X_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); break; - + case LPC47M15X_SP2: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com2); break; - + case LPC47M15X_KBC: res0 = find_resource(dev, PNP_IDX_IO0); res1 = find_resource(dev, PNP_IDX_IO1); @@ -125,13 +124,12 @@ static void lpc47m15x_init(device_t dev) } } -static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(device_t dev) { outb(0x55, dev->path.pnp.port); } -static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(device_t dev) { - outb(0xaa, dev->path.pnp.port); + outb(0xaa, dev->path.pnp.port); } - diff --git a/src/superio/smsc/lpc47n217/Config.lb b/src/superio/smsc/lpc47n217/Config.lb index 67c0dfd1b422..5a15d159ae75 100644 --- a/src/superio/smsc/lpc47n217/Config.lb +++ b/src/superio/smsc/lpc47n217/Config.lb @@ -1,22 +1,22 @@ -## +## ## This file is part of the coreboot project. -## +## ## Copyright (C) 2005 Digital Design Corporation -## +## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. -## +## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. -## +## ## You should have received a copy of the GNU General Public License ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## +## config chip.h object superio.o diff --git a/src/superio/smsc/lpc47n217/Makefile.inc b/src/superio/smsc/lpc47n217/Makefile.inc index fa7729d809f6..10710b908052 100644 --- a/src/superio/smsc/lpc47n217/Makefile.inc +++ b/src/superio/smsc/lpc47n217/Makefile.inc @@ -1,22 +1,22 @@ -## +## ## This file is part of the coreboot project. -## +## ## Copyright (C) 2005 Digital Design Corporation -## +## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. -## +## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. -## +## ## You should have received a copy of the GNU General Public License ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## +## #config chip.h obj-$(CONFIG_SUPERIO_SMSC_LPC47N217) += superio.o diff --git a/src/superio/smsc/lpc47n217/lpc47n217.h b/src/superio/smsc/lpc47n217/lpc47n217.h index c52ca521eb1c..3795821129b7 100644 --- a/src/superio/smsc/lpc47n217/lpc47n217.h +++ b/src/superio/smsc/lpc47n217/lpc47n217.h @@ -18,8 +18,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -// These are arbitrary, but must match declarations in the mainboard config file. -// Values chosen to match SMSC 47B37x. +/* These are arbitrary, but must match declarations in the mainboard config file. + * Values chosen to match SMSC 47B37x. + */ #define LPC47N217_PP 3 /* Parallel Port */ #define LPC47N217_SP1 4 /* Com1 */ diff --git a/src/superio/smsc/lpc47n217/lpc47n217_early_serial.c b/src/superio/smsc/lpc47n217/lpc47n217_early_serial.c index f60dbcffe112..2b0c634bcfa2 100644 --- a/src/superio/smsc/lpc47n217/lpc47n217_early_serial.c +++ b/src/superio/smsc/lpc47n217/lpc47n217_early_serial.c @@ -24,123 +24,126 @@ #include <assert.h> #include "lpc47n217.h" -//---------------------------------------------------------------------------------- -// Function: pnp_enter_conf_state -// Parameters: dev - high 8 bits = Super I/O port -// Return Value: None -// Description: Enable access to the LPC47N217's configuration registers. -// -static inline void pnp_enter_conf_state(device_t dev) { +/* + * Function: pnp_enter_conf_state + * Parameters: dev - high 8 bits = Super I/O port + * Return Value: None + * Description: Enable access to the LPC47N217's configuration registers. + */ +static inline void pnp_enter_conf_state(device_t dev) +{ unsigned port = dev>>8; - outb(0x55, port); + outb(0x55, port); } -//---------------------------------------------------------------------------------- -// Function: pnp_exit_conf_state -// Parameters: dev - high 8 bits = Super I/O port -// Return Value: None -// Description: Disable access to the LPC47N217's configuration registers. -// -static void pnp_exit_conf_state(device_t dev) { +/* + * Function: pnp_exit_conf_state + * Parameters: dev - high 8 bits = Super I/O port + * Return Value: None + * Description: Disable access to the LPC47N217's configuration registers. + */ +static void pnp_exit_conf_state(device_t dev) +{ unsigned port = dev>>8; - outb(0xaa, port); + outb(0xaa, port); } -//---------------------------------------------------------------------------------- -// Function: lpc47n217_pnp_set_iobase -// Parameters: dev - high 8 bits = Super I/O port, -// low 8 bits = logical device number (per lpc47n217.h) -// iobase - base I/O port for the logical device -// Return Value: None -// Description: Program the base I/O port for the specified logical device. -// +/* + * Function: lpc47n217_pnp_set_iobase + * Parameters: dev - high 8 bits = Super I/O port, + * low 8 bits = logical device number (per lpc47n217.h) + * iobase - base I/O port for the logical device + * Return Value:None + * Description: Program the base I/O port for the specified logical device. + * + */ void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase) { - // LPC47N217 requires base ports to be a multiple of 4 + /* LPC47N217 requires base ports to be a multiple of 4 */ ASSERT(!(iobase & 0x3)); switch(dev & 0xFF) { - case LPC47N217_PP: + case LPC47N217_PP: pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff); break; - - case LPC47N217_SP1: + + case LPC47N217_SP1: pnp_write_config(dev, 0x24, (iobase >> 2) & 0xff); break; - + case LPC47N217_SP2: pnp_write_config(dev, 0x25, (iobase >> 2) & 0xff); break; - + default: break; } } -//---------------------------------------------------------------------------------- -// Function: lpc47n217_pnp_set_enable -// Parameters: dev - high 8 bits = Super I/O port, -// low 8 bits = logical device number (per lpc47n217.h) -// enable - 0 to disable, anythig else to enable -// Return Value: None -// Description: Enable or disable the specified logical device. -// Technically, a full disable requires setting the device's base -// I/O port below 0x100. We don't do that here, because we don't -// have access to a data structure that specifies what the 'real' -// base port is (when asked to enable the device). Also the function -// is used only to disable the device while its true base port is -// programmed (see lpc47n217_enable_serial() below). -// +/* + * Function: lpc47n217_pnp_set_enable + * Parameters: dev - high 8 bits = Super I/O port, + * low 8 bits = logical device number (per lpc47n217.h) + * enable - 0 to disable, anythig else to enable + * Return Value:None + * Description: Enable or disable the specified logical device. + * Technically, a full disable requires setting the device's base + * I/O port below 0x100. We don't do that here, because we don't + * have access to a data structure that specifies what the 'real' + * base port is (when asked to enable the device). Also the function + * is used only to disable the device while its true base port is + * programmed (see lpc47n217_enable_serial() below). + */ void lpc47n217_pnp_set_enable(device_t dev, int enable) { uint8_t power_register = 0; uint8_t power_mask = 0; uint8_t current_power; uint8_t new_power; - + switch(dev & 0xFF) { - case LPC47N217_PP: + case LPC47N217_PP: power_register = 0x01; power_mask = 0x04; break; - - case LPC47N217_SP1: + + case LPC47N217_SP1: power_register = 0x02; power_mask = 0x08; break; - + case LPC47N217_SP2: power_register = 0x02; power_mask = 0x80; break; - + default: return; } current_power = pnp_read_config(dev, power_register); - new_power = current_power & ~power_mask; // disable by default + new_power = current_power & ~power_mask; /* disable by default */ if (enable) - new_power |= power_mask; // Enable + new_power |= power_mask; /* Enable */ pnp_write_config(dev, power_register, new_power); } -//---------------------------------------------------------------------------------- -// Function: lpc47n217_enable_serial -// Parameters: dev - high 8 bits = Super I/O port, -// low 8 bits = logical device number (per lpc47n217.h) -// iobase - processor I/O port address to assign to this serial device -// Return Value: bool -// Description: Configure the base I/O port of the specified serial device -// and enable the serial device. -// +/* + * Function: lpc47n217_enable_serial + * Parameters: dev - high 8 bits = Super I/O port, + * low 8 bits = logical device number (per lpc47n217.h) + * iobase - processor I/O port address to assign to this serial device + * Return Value:bool + * Description: Configure the base I/O port of the specified serial device + * and enable the serial device. + */ static void lpc47n217_enable_serial(device_t dev, unsigned iobase) { - // NOTE: Cannot use pnp_set_XXX() here because they assume chip - // support for logical devices, which the LPC47N217 doesn't have - + /* NOTE: Cannot use pnp_set_XXX() here because they assume chip + * support for logical devices, which the LPC47N217 doesn't have*/ + pnp_enter_conf_state(dev); lpc47n217_pnp_set_enable(dev, 0); lpc47n217_pnp_set_iobase(dev, iobase); diff --git a/src/superio/smsc/lpc47n217/superio.c b/src/superio/smsc/lpc47n217/superio.c index 90a3be1a8c95..b83fe6cf6d68 100644 --- a/src/superio/smsc/lpc47n217/superio.c +++ b/src/superio/smsc/lpc47n217/superio.c @@ -3,7 +3,7 @@ * * Copyright (C) 2000 AG Electronics Ltd. * Copyright (C) 2003-2004 Linux Networx - * Copyright (C) 2004 Tyan + * Copyright (C) 2004 Tyan * Copyright (C) 2005 Digital Design Corporation * * This program is free software; you can redistribute it and/or modify @@ -37,7 +37,7 @@ #include "chip.h" #include "lpc47n217.h" -// Forward declarations +/* Forward declarations */ static void enable_dev(device_t dev); static void lpc47n217_pnp_set_resources(device_t dev); static void lpc47n217_pnp_enable_resources(device_t dev); @@ -53,7 +53,6 @@ static void lpc47n217_pnp_set_enable(device_t dev, int enable); static void pnp_enter_conf_state(device_t dev); static void pnp_exit_conf_state(device_t dev); - struct chip_operations superio_smsc_lpc47n217_ops = { CHIP_NAME("SMSC LPC47N217 Super I/O") .enable_dev = enable_dev, @@ -68,69 +67,72 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, LPC47N217_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, LPC47N217_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, LPC47N217_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, } + { &ops, LPC47N217_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, LPC47N217_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, LPC47N217_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, } }; /**********************************************************************************/ -/* PUBLIC INTERFACE */ +/* PUBLIC INTERFACE */ /**********************************************************************************/ -//---------------------------------------------------------------------------------- -// Function: enable_dev -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Create device structures and allocate resources to devices -// specified in the pnp_dev_info array (above). -// +/* + * Function: enable_dev + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Create device structures and allocate resources to devices + * specified in the pnp_dev_info array (above). + */ static void enable_dev(device_t dev) { - pnp_enable_devices(dev, &pnp_ops, - ARRAY_SIZE(pnp_dev_info), - pnp_dev_info); + pnp_enable_devices(dev, &pnp_ops, + ARRAY_SIZE(pnp_dev_info), + pnp_dev_info); } -//---------------------------------------------------------------------------------- -// Function: lpc47n217_pnp_set_resources -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Configure the specified Super I/O device with the resources -// (I/O space, etc.) that have been allocate for it. -// +/* + * Function: lpc47n217_pnp_set_resources + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Configure the specified Super I/O device with the resources + * (I/O space, etc.) that have been allocate for it. + */ static void lpc47n217_pnp_set_resources(device_t dev) { int i; - - pnp_enter_conf_state(dev); - // NOTE: Cannot use pnp_set_resources() here because it assumes chip - // support for logical devices, which the LPC47N217 doesn't have + pnp_enter_conf_state(dev); + + /* NOTE: Cannot use pnp_set_resources() here because it assumes chip + * support for logical devices, which the LPC47N217 doesn't have + */ for(i = 0; i < dev->resources; i++) lpc47n217_pnp_set_resource(dev, &dev->resource[i]); -// dump_pnp_device(dev); - - pnp_exit_conf_state(dev); -} + /* dump_pnp_device(dev); */ + + pnp_exit_conf_state(dev); +} static void lpc47n217_pnp_enable_resources(device_t dev) -{ - pnp_enter_conf_state(dev); +{ + pnp_enter_conf_state(dev); - // NOTE: Cannot use pnp_enable_resources() here because it assumes chip - // support for logical devices, which the LPC47N217 doesn't have - lpc47n217_pnp_set_enable(dev, 1); + /* NOTE: Cannot use pnp_enable_resources() here because it assumes chip + * support for logical devices, which the LPC47N217 doesn't have + */ + lpc47n217_pnp_set_enable(dev, 1); - pnp_exit_conf_state(dev); + pnp_exit_conf_state(dev); } static void lpc47n217_pnp_enable(device_t dev) { - pnp_enter_conf_state(dev); + pnp_enter_conf_state(dev); - // NOTE: Cannot use pnp_set_enable() here because it assumes chip - // support for logical devices, which the LPC47N217 doesn't have + /* NOTE: Cannot use pnp_set_enable() here because it assumes chip + * support for logical devices, which the LPC47N217 doesn't have + */ if(dev->enabled) { lpc47n217_pnp_set_enable(dev, 1); @@ -139,17 +141,17 @@ static void lpc47n217_pnp_enable(device_t dev) lpc47n217_pnp_set_enable(dev, 0); } - pnp_exit_conf_state(dev); + pnp_exit_conf_state(dev); } -//---------------------------------------------------------------------------------- -// Function: lpc47n217_init -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Initialize the specified Super I/O device. -// Devices other than COM ports are ignored. -// For COM ports, we configure the baud rate. -// +/* + * Function: lpc47n217_init + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Initialize the specified Super I/O device. + * Devices other than COM ports are ignored. + * For COM ports, we configure the baud rate. + */ static void lpc47n217_init(device_t dev) { struct superio_smsc_lpc47n217_config* conf = dev->chip_info; @@ -159,7 +161,7 @@ static void lpc47n217_init(device_t dev) return; switch(dev->path.pnp.device) { - case LPC47N217_SP1: + case LPC47N217_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); break; @@ -171,9 +173,8 @@ static void lpc47n217_init(device_t dev) } } - /**********************************************************************************/ -/* PRIVATE FUNCTIONS */ +/* PRIVATE FUNCTIONS */ /**********************************************************************************/ static void lpc47n217_pnp_set_resource(device_t dev, struct resource *resource) @@ -185,8 +186,9 @@ static void lpc47n217_pnp_set_resource(device_t dev, struct resource *resource) } /* Now store the resource */ - // NOTE: Cannot use pnp_set_XXX() here because they assume chip - // support for logical devices, which the LPC47N217 doesn't have + /* NOTE: Cannot use pnp_set_XXX() here because they assume chip + * support for logical devices, which the LPC47N217 doesn't have + */ if (resource->flags & IORESOURCE_IO) { lpc47n217_pnp_set_iobase(dev, resource->base); @@ -210,20 +212,20 @@ static void lpc47n217_pnp_set_resource(device_t dev, struct resource *resource) static void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase) { ASSERT(!(iobase & 0x3)); - + switch(dev->path.pnp.device) { - case LPC47N217_PP: + case LPC47N217_PP: pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff); break; - - case LPC47N217_SP1: + + case LPC47N217_SP1: pnp_write_config(dev, 0x24, (iobase >> 2) & 0xff); break; - + case LPC47N217_SP2: pnp_write_config(dev, 0x25, (iobase >> 2) & 0xff); break; - + default: BUG(); break; @@ -238,7 +240,7 @@ static void lpc47n217_pnp_set_drq(device_t dev, unsigned drq) uint8_t current_config = pnp_read_config(dev, PP_DMA_SELECTION_REGISTER); uint8_t new_config; - ASSERT(!(drq & ~PP_DMA_MASK)); // DRQ out of range?? + ASSERT(!(drq & ~PP_DMA_MASK)); /* DRQ out of range?? */ new_config = (current_config & ~PP_DMA_MASK) | drq; pnp_write_config(dev, PP_DMA_SELECTION_REGISTER, new_config); } else { @@ -252,31 +254,31 @@ static void lpc47n217_pnp_set_irq(device_t dev, unsigned irq) uint8_t irq_config_mask = 0; uint8_t current_config; uint8_t new_config; - + switch(dev->path.pnp.device) { - case LPC47N217_PP: + case LPC47N217_PP: irq_config_register = 0x27; irq_config_mask = 0x0F; break; - - case LPC47N217_SP1: + + case LPC47N217_SP1: irq_config_register = 0x28; irq_config_mask = 0xF0; irq <<= 4; break; - + case LPC47N217_SP2: irq_config_register = 0x28; irq_config_mask = 0x0F; break; - + default: BUG(); return; } - ASSERT(!(irq & ~irq_config_mask)); // IRQ out of range?? - + ASSERT(!(irq & ~irq_config_mask)); /* IRQ out of range?? */ + current_config = pnp_read_config(dev, irq_config_register); new_config = (current_config & ~irq_config_mask) | irq; pnp_write_config(dev, irq_config_register, new_config); @@ -288,100 +290,99 @@ static void lpc47n217_pnp_set_enable(device_t dev, int enable) uint8_t power_mask = 0; uint8_t current_power; uint8_t new_power; - + switch(dev->path.pnp.device) { - case LPC47N217_PP: + case LPC47N217_PP: power_register = 0x01; power_mask = 0x04; break; - - case LPC47N217_SP1: + + case LPC47N217_SP1: power_register = 0x02; power_mask = 0x08; break; - + case LPC47N217_SP2: power_register = 0x02; power_mask = 0x80; break; - + default: BUG(); return; } current_power = pnp_read_config(dev, power_register); - new_power = current_power & ~power_mask; // disable by default + new_power = current_power & ~power_mask; /* disable by default */ if (enable) { struct resource* ioport_resource = find_resource(dev, PNP_IDX_IO0); lpc47n217_pnp_set_iobase(dev, ioport_resource->base); - - new_power |= power_mask; // Enable - - } else { + + new_power |= power_mask; /* Enable */ + + } else { lpc47n217_pnp_set_iobase(dev, 0); } pnp_write_config(dev, power_register, new_power); } - -//---------------------------------------------------------------------------------- -// Function: pnp_enter_conf_state -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Enable access to the LPC47N217's configuration registers. -// -static void pnp_enter_conf_state(device_t dev) +/* + * Function: pnp_enter_conf_state + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Enable access to the LPC47N217's configuration registers. + */ +static void pnp_enter_conf_state(device_t dev) { outb(0x55, dev->path.pnp.port); } -//---------------------------------------------------------------------------------- -// Function: pnp_exit_conf_state -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Disable access to the LPC47N217's configuration registers. -// -static void pnp_exit_conf_state(device_t dev) +/* + * Function: pnp_exit_conf_state + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Disable access to the LPC47N217's configuration registers. + */ +static void pnp_exit_conf_state(device_t dev) { - outb(0xaa, dev->path.pnp.port); + outb(0xaa, dev->path.pnp.port); } #if 0 -//---------------------------------------------------------------------------------- -// Function: dump_pnp_device -// Parameters: dev - pointer to structure describing a Super I/O device -// Return Value: None -// Description: Print the values of all of the LPC47N217's configuration registers. -// NOTE: The LPC47N217 must be in configuration mode when this -// function is called. -// +/* + * Function: dump_pnp_device + * Parameters: dev - pointer to structure describing a Super I/O device + * Return Value: None + * Description: Print the values of all of the LPC47N217's configuration registers. + * NOTE: The LPC47N217 must be in configuration mode when this + * function is called. + */ static void dump_pnp_device(device_t dev) { - int register_index; - print_debug("\r\n"); + int register_index; + print_debug("\r\n"); - for(register_index = 0; register_index <= LPC47N217_MAX_CONFIG_REGISTER; register_index++) { - uint8_t register_value; + for(register_index = 0; register_index <= LPC47N217_MAX_CONFIG_REGISTER; register_index++) { + uint8_t register_value; - if ((register_index & 0x0f) == 0) { - print_debug_hex8(register_index); - print_debug_char(':'); - } + if ((register_index & 0x0f) == 0) { + print_debug_hex8(register_index); + print_debug_char(':'); + } - // Skip over 'register' that would cause exit from configuration mode - if (register_index == 0xaa) + /* Skip over 'register' that would cause exit from configuration mode */ + if (register_index == 0xaa) register_value = 0xaa; else - register_value = pnp_read_config(dev, register_index); - - print_debug_char(' '); - print_debug_hex8(register_value); - if ((register_index & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } + register_value = pnp_read_config(dev, register_index); + + print_debug_char(' '); + print_debug_hex8(register_value); + if ((register_index & 0x0f) == 0x0f) { + print_debug("\r\n"); + } + } print_debug("\r\n"); } diff --git a/src/superio/smsc/smscsuperio/Config.lb b/src/superio/smsc/smscsuperio/Config.lb index cb5d059b5964..512a21862363 100644 --- a/src/superio/smsc/smscsuperio/Config.lb +++ b/src/superio/smsc/smscsuperio/Config.lb @@ -20,4 +20,3 @@ config chip.h object superio.o - diff --git a/src/superio/smsc/smscsuperio/Makefile.inc b/src/superio/smsc/smscsuperio/Makefile.inc index f1e24ab9de6e..7aa10532bd5b 100644 --- a/src/superio/smsc/smscsuperio/Makefile.inc +++ b/src/superio/smsc/smscsuperio/Makefile.inc @@ -20,4 +20,3 @@ #config chip.h obj-$(CONFIG_SUPERIO_SMSC_SMSCSUPERIO) += superio.o - diff --git a/src/superio/smsc/smscsuperio/superio.c b/src/superio/smsc/smscsuperio/superio.c index 7bc12a4fa538..ffbf82ae42cf 100644 --- a/src/superio/smsc/smscsuperio/superio.c +++ b/src/superio/smsc/smscsuperio/superio.c @@ -120,7 +120,7 @@ static const struct logical_devices { uint8_t superio_id; int devs[MAX_LOGICAL_DEVICES]; } logical_device_table[] = { - // Chip FDC PP SP1 SP2 RTC KBC AUX XBUS HWM GAME PME MPU RT ACPI SMB + /* Chip FDC PP SP1 SP2 RTC KBC AUX XBUS HWM GAME PME MPU RT ACPI SMB */ {LPC47M172,{0, 3, 4, 2, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, -1}}, {FDC37B80X,{0, 3, 4, 5, -1, 7, 8, -1, -1, -1, -1, -1, -1, -1, -1}}, {FDC37B78X,{0, 3, 4, 5, 6, 7, 8, -1, -1, -1, -1, -1, -1, 10, -1}}, diff --git a/src/superio/via/vt1211/Config.lb b/src/superio/via/vt1211/Config.lb index a1dfde020ef5..c914fe2fb966 100644 --- a/src/superio/via/vt1211/Config.lb +++ b/src/superio/via/vt1211/Config.lb @@ -1,2 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com> +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License as +## published by the Free Software Foundation; either version 2 of +## the License, or (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +## MA 02110-1301 USA +## + config chip.h object vt1211.o diff --git a/src/superio/via/vt1211/Makefile.inc b/src/superio/via/vt1211/Makefile.inc index 27ff73b48a2f..3754ff3f8b13 100644 --- a/src/superio/via/vt1211/Makefile.inc +++ b/src/superio/via/vt1211/Makefile.inc @@ -1,2 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com> +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License as +## published by the Free Software Foundation; either version 2 of +## the License, or (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +## MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_VIA_VT1211) += vt1211.o diff --git a/src/superio/via/vt1211/chip.h b/src/superio/via/vt1211/chip.h index cfe0a319058c..9b2f29a332fc 100644 --- a/src/superio/via/vt1211/chip.h +++ b/src/superio/via/vt1211/chip.h @@ -1,3 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + #ifndef _SUPERIO_VIA_VT1211 #define _SUPERIO_VIA_VT1211 diff --git a/src/superio/via/vt1211/vt1211.c b/src/superio/via/vt1211/vt1211.c index 53e4523cd856..ae5624055aa6 100644 --- a/src/superio/via/vt1211/vt1211.c +++ b/src/superio/via/vt1211/vt1211.c @@ -1,6 +1,7 @@ /* - * (C) Copyright 2004 Nick Barker <nick.barker9@btinternet.com> + * This file is part of the coreboot project. * + * Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -20,7 +21,6 @@ /* vt1211 routines and defines*/ - #include <arch/io.h> #include <console/console.h> #include <device/device.h> @@ -31,37 +31,36 @@ #include "vt1211.h" #include "chip.h" - static unsigned char vt1211hwmonitorinits[]={ - 0x10,0x3, 0x11,0x10, 0x12,0xd, 0x13,0x7f, - 0x14,0x21, 0x15,0x81, 0x16,0xbd, 0x17,0x8a, - 0x18,0x0, 0x19,0x0, 0x1a,0x0, 0x1b,0x0, - 0x1d,0xff, 0x1e,0x0, 0x1f,0x73, 0x20,0x67, - 0x21,0xc1, 0x22,0xca, 0x23,0x74, 0x24,0xc2, - 0x25,0xc7, 0x26,0xc9, 0x27,0x7f, 0x29,0x0, - 0x2a,0x0, 0x2b,0xff, 0x2c,0x0, 0x2d,0xff, - 0x2e,0x0, 0x2f,0xff, 0x30,0x0, 0x31,0xff, - 0x32,0x0, 0x33,0xff, 0x34,0x0, 0x39,0xff, - 0x3a,0x0, 0x3b,0xff, 0x3c,0xff, 0x3d,0xff, - 0x3e,0x0, 0x3f,0xb0, 0x43,0xff, 0x44,0xff, - 0x46,0xff, 0x47,0x50, 0x4a,0x3, 0x4b,0xc0, - 0x4c,0x0, 0x4d,0x0, 0x4e,0xf, 0x5d,0x77, - 0x5c,0x0, 0x5f,0x33, 0x40,0x1}; - -static void pnp_enter_ext_func_mode(device_t dev) + 0x10,0x3, 0x11,0x10, 0x12,0xd, 0x13,0x7f, + 0x14,0x21, 0x15,0x81, 0x16,0xbd, 0x17,0x8a, + 0x18,0x0, 0x19,0x0, 0x1a,0x0, 0x1b,0x0, + 0x1d,0xff, 0x1e,0x0, 0x1f,0x73, 0x20,0x67, + 0x21,0xc1, 0x22,0xca, 0x23,0x74, 0x24,0xc2, + 0x25,0xc7, 0x26,0xc9, 0x27,0x7f, 0x29,0x0, + 0x2a,0x0, 0x2b,0xff, 0x2c,0x0, 0x2d,0xff, + 0x2e,0x0, 0x2f,0xff, 0x30,0x0, 0x31,0xff, + 0x32,0x0, 0x33,0xff, 0x34,0x0, 0x39,0xff, + 0x3a,0x0, 0x3b,0xff, 0x3c,0xff, 0x3d,0xff, + 0x3e,0x0, 0x3f,0xb0, 0x43,0xff, 0x44,0xff, + 0x46,0xff, 0x47,0x50, 0x4a,0x3, 0x4b,0xc0, + 0x4c,0x0, 0x4d,0x0, 0x4e,0xf, 0x5d,0x77, + 0x5c,0x0, 0x5f,0x33, 0x40,0x1 +}; + +static void pnp_enter_ext_func_mode(device_t dev) { outb(0x87, dev->path.pnp.port); outb(0x87, dev->path.pnp.port); } -static void pnp_exit_ext_func_mode(device_t dev) +static void pnp_exit_ext_func_mode(device_t dev) { outb(0xaa, dev->path.pnp.port); } static void vt1211_set_iobase(device_t dev, unsigned index, unsigned iobase) { - switch (dev->path.pnp.device) { case VT1211_FDC: case VT1211_PP: @@ -75,14 +74,13 @@ static void vt1211_set_iobase(device_t dev, unsigned index, unsigned iobase) pnp_write_config(dev, index + 1, iobase & 0xff); break; } - } static void init_hwm(unsigned long base) { int i; - // initialize vt1211 hardware monitor registers, which are at 0xECXX + /* initialize vt1211 hardware monitor registers, which are at 0xECXX */ for(i = 0; i < sizeof(vt1211hwmonitorinits); i += 2) { outb(vt1211hwmonitorinits[i + 1], base + vt1211hwmonitorinits[i]); @@ -117,8 +115,6 @@ static void vt1211_init(struct device *dev) default: printk_info("vt1211 asked to initialise unknown device!\n"); } - - } void vt1211_pnp_enable_resources(device_t dev) @@ -139,7 +135,7 @@ void vt1211_pnp_set_resources(struct device *dev) for( i = 0 ; i < dev->resources; i++){ resource = &dev->resource[i]; resource->flags |= IORESOURCE_STORED; - report_resource_stored(dev, resource, ""); + report_resource_stored(dev, resource, ""); } return; } @@ -176,7 +172,7 @@ void vt1211_pnp_set_resources(struct device *dev) } resource->flags |= IORESOURCE_STORED; - report_resource_stored(dev, resource, ""); + report_resource_stored(dev, resource, ""); } pnp_exit_ext_func_mode(dev); diff --git a/src/superio/via/vt1211/vt1211.h b/src/superio/via/vt1211/vt1211.h index 4c58011d7196..de4a2d7a26df 100644 --- a/src/superio/via/vt1211/vt1211.h +++ b/src/superio/via/vt1211/vt1211.h @@ -1,6 +1,7 @@ /* - * (C) Copyright 2004 Nick Barker <nick.barker9@btinternet.com> + * This file is part of the coreboot project. * + * Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/src/superio/winbond/w83627dhg/Config.lb b/src/superio/winbond/w83627dhg/Config.lb index 1513f0df314a..db6949f0979a 100644 --- a/src/superio/winbond/w83627dhg/Config.lb +++ b/src/superio/winbond/w83627dhg/Config.lb @@ -20,4 +20,3 @@ config chip.h object superio.o - diff --git a/src/superio/winbond/w83627dhg/Makefile.inc b/src/superio/winbond/w83627dhg/Makefile.inc index cdec98d0b8c7..e24b3a755e30 100644 --- a/src/superio/winbond/w83627dhg/Makefile.inc +++ b/src/superio/winbond/w83627dhg/Makefile.inc @@ -20,4 +20,3 @@ #config chip.h obj-$(CONFIG_SUPERIO_WINBOND_W83627DHG) += superio.o - diff --git a/src/superio/winbond/w83627dhg/superio.c b/src/superio/winbond/w83627dhg/superio.c index 383f9a568179..998a097022d3 100644 --- a/src/superio/winbond/w83627dhg/superio.c +++ b/src/superio/winbond/w83627dhg/superio.c @@ -103,8 +103,8 @@ static struct pnp_info pnp_dev_info[] = { { &ops, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, }, { &ops, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, }, { &ops, W83627DHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0xfff, 0 }, { 0xfff, 0x4}, }, - // the next line makes coreboot hang in pnp_enable_devices() - // { &ops, W83627DHG_SPI, PNP_IO1, { 0xff8, 0 }, }, + /* the next line makes coreboot hang in pnp_enable_devices() */ + /* { &ops, W83627DHG_SPI, PNP_IO1, { 0xff8, 0 }, }, */ { &ops, W83627DHG_GPIO6, }, { &ops, W83627DHG_WDTO_PLED, }, { &ops, W83627DHG_GPIO2345, }, diff --git a/src/superio/winbond/w83627ehg/Config.lb b/src/superio/winbond/w83627ehg/Config.lb index 066c65836aed..b858b85ec786 100644 --- a/src/superio/winbond/w83627ehg/Config.lb +++ b/src/superio/winbond/w83627ehg/Config.lb @@ -1,24 +1,23 @@ -## +## ## This file is part of the coreboot project. -## +## ## Copyright (C) 2007 AMD ## Written by Yinghai Lu <yinghai.lu@amd.com> for AMD. -## +## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. -## +## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. -## +## ## You should have received a copy of the GNU General Public License ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## +## config chip.h object superio.o - diff --git a/src/superio/winbond/w83627ehg/Makefile.inc b/src/superio/winbond/w83627ehg/Makefile.inc index 9b56268aef12..a262e4aa01c6 100644 --- a/src/superio/winbond/w83627ehg/Makefile.inc +++ b/src/superio/winbond/w83627ehg/Makefile.inc @@ -1,24 +1,23 @@ -## +## ## This file is part of the coreboot project. -## +## ## Copyright (C) 2007 AMD ## Written by Yinghai Lu <yinghai.lu@amd.com> for AMD. -## +## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. -## +## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. -## +## ## You should have received a copy of the GNU General Public License ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## +## #config chip.h obj-$(CONFIG_SUPERIO_WINBOND_W83627EHG) += superio.o - diff --git a/src/superio/winbond/w83627ehg/superio.c b/src/superio/winbond/w83627ehg/superio.c index e44a45ea8521..daf4b7f26178 100644 --- a/src/superio/winbond/w83627ehg/superio.c +++ b/src/superio/winbond/w83627ehg/superio.c @@ -3,7 +3,7 @@ * * Copyright (C) 2000 AG Electronics Ltd. * Copyright (C) 2003-2004 Linux Networx - * Copyright (C) 2004 Tyan + * Copyright (C) 2004 Tyan * Copyright (C) 2007 AMD * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD. * @@ -57,7 +57,8 @@ static uint8_t pnp_read_index(unsigned long port_base, uint8_t reg) return inb(port_base + 1); } -static void enable_hwm_smbus(device_t dev) { +static void enable_hwm_smbus(device_t dev) +{ /* Set the pin 91,92 as I2C bus. */ uint8_t reg, value; reg = 0x2a; @@ -99,7 +100,7 @@ static void init_hwm(unsigned long base) value = pnp_read_index(base, reg); value &= 0xff & (~(hwm_reg_values[i + 1])); value |= 0xff & hwm_reg_values[i + 2]; - // printk_debug("base = 0x%04x, reg = 0x%02x, value = 0x%02x\r\n", base, reg,value); + /* printk_debug("base = 0x%04x, reg = 0x%02x, value = 0x%02x\r\n", base, reg,value); */ pnp_write_index(base, reg, value); } } @@ -182,7 +183,7 @@ static struct pnp_info pnp_dev_info[] = { { &ops, W83627EHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, { &ops, W83627EHG_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, { &ops, W83627EHG_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - // No 4 { 0,}, + /* No 4 { 0,}, */ { &ops, W83627EHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, { &ops, W83627EHG_SFI, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, { &ops, W83627EHG_WDTO_PLED, }, @@ -208,4 +209,3 @@ struct chip_operations superio_winbond_w83627ehg_ops = { CHIP_NAME("Winbond W83627EHG Super I/O") .enable_dev = enable_dev, }; - diff --git a/src/superio/winbond/w83627ehg/w83627ehg.h b/src/superio/winbond/w83627ehg/w83627ehg.h index 8c245908979c..aeda043fcb7a 100644 --- a/src/superio/winbond/w83627ehg/w83627ehg.h +++ b/src/superio/winbond/w83627ehg/w83627ehg.h @@ -31,8 +31,8 @@ #define W83627EHG_HWM 11 /* Hardware Monitor */ /* virtual devices sharing the enables are encoded as follows: - VLDN = baseLDN[7:0] | [10:8] bitpos of enable in 0x30 of baseLDN -*/ + * VLDN = baseLDN[7:0] | [10:8] bitpos of enable in 0x30 of baseLDN + */ #define W83627EHG_SFI ((1 << 8) | 6) /* Flash has bit1 as enable */ #define W83627EHG_GPIO1 W83627EHG_GPIO_GAME_MIDI /* GPIO1 is at LDN 7, bit 0 */ diff --git a/src/superio/winbond/w83627ehg/w83627ehg_early_init.c b/src/superio/winbond/w83627ehg/w83627ehg_early_init.c index f9bff363bdb9..125837a55637 100644 --- a/src/superio/winbond/w83627ehg/w83627ehg_early_init.c +++ b/src/superio/winbond/w83627ehg/w83627ehg_early_init.c @@ -35,4 +35,3 @@ static void w83627ehg_enable_dev(device_t dev, unsigned iobase) pnp_set_iobase(dev, PNP_IDX_IO0, iobase); pnp_set_enable(dev, 1); } - diff --git a/src/superio/winbond/w83627ehg/w83627ehg_early_serial.c b/src/superio/winbond/w83627ehg/w83627ehg_early_serial.c index 9a5fe566bcfc..170b6a7ded2d 100644 --- a/src/superio/winbond/w83627ehg/w83627ehg_early_serial.c +++ b/src/superio/winbond/w83627ehg/w83627ehg_early_serial.c @@ -44,4 +44,3 @@ static void w83627ehg_enable_serial(device_t dev, unsigned iobase) pnp_set_enable(dev, 1); pnp_exit_ext_func_mode(dev); } - diff --git a/src/superio/winbond/w83627hf/Config.lb b/src/superio/winbond/w83627hf/Config.lb index f62a567d6147..5f1320d8656c 100644 --- a/src/superio/winbond/w83627hf/Config.lb +++ b/src/superio/winbond/w83627hf/Config.lb @@ -1,2 +1,24 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## Copyright (C) 2004 Tyan By LYH change from PC87360 +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + config chip.h object superio.o diff --git a/src/superio/winbond/w83627hf/Makefile.inc b/src/superio/winbond/w83627hf/Makefile.inc index 4ecaa404ee01..795e197ff17c 100644 --- a/src/superio/winbond/w83627hf/Makefile.inc +++ b/src/superio/winbond/w83627hf/Makefile.inc @@ -1,2 +1,24 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## Copyright (C) 2004 Tyan By LYH change from PC87360 +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_WINBOND_W83627HF) += superio.o diff --git a/src/superio/winbond/w83627hf/chip.h b/src/superio/winbond/w83627hf/chip.h index 3f3ba491a9f3..e8dfe2ea9954 100644 --- a/src/superio/winbond/w83627hf/chip.h +++ b/src/superio/winbond/w83627hf/chip.h @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/winbond/w83627hf/superio.c b/src/superio/winbond/w83627hf/superio.c index cd84a33530ba..1ad79194bef8 100644 --- a/src/superio/winbond/w83627hf/superio.c +++ b/src/superio/winbond/w83627hf/superio.c @@ -1,8 +1,24 @@ -/* Copyright 2000 AG Electronics Ltd. */ -/* Copyright 2003-2004 Linux Networx */ -/* Copyright 2004 Tyan - By LYH change from PC87360 */ -/* This code is distributed without warranty under the GPL v2 (see COPYING) */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ #include <arch/io.h> #include <device/device.h> @@ -17,12 +33,12 @@ #include "chip.h" #include "w83627hf.h" - static void pnp_enter_ext_func_mode(device_t dev) { outb(0x87, dev->path.pnp.port); outb(0x87, dev->path.pnp.port); } + static void pnp_exit_ext_func_mode(device_t dev) { outb(0xaa, dev->path.pnp.port); @@ -40,7 +56,8 @@ static uint8_t pnp_read_index(unsigned long port_base, uint8_t reg) return inb(port_base + 1); } -static void enable_hwm_smbus(device_t dev) { +static void enable_hwm_smbus(device_t dev) +{ /* set the pin 91,92 as I2C bus */ uint8_t reg, value; reg = 0x2b; @@ -72,7 +89,7 @@ static void init_hwm(unsigned long base) int i; unsigned hwm_reg_values[] = { -/* reg mask data */ + /* reg mask data */ 0x40, 0xff, 0x81, /* start HWM */ 0x48, 0xaa, 0x2a, /* set SMBus base to 0x54>>1 */ 0x4a, 0x21, 0x21, /* set T2 SMBus base to 0x92>>1 and T3 SMBus base to 0x94>>1 */ @@ -84,9 +101,9 @@ static void init_hwm(unsigned long base) }; - for(i = 0; i< ARRAY_SIZE(hwm_reg_values); i+=3 ) { - reg = hwm_reg_values[i]; - value = pnp_read_index(base, reg); + for(i = 0; i< ARRAY_SIZE(hwm_reg_values); i+=3 ) { + reg = hwm_reg_values[i]; + value = pnp_read_index(base, reg); value &= 0xff & hwm_reg_values[i+1]; value |= 0xff & hwm_reg_values[i+2]; #if 0 @@ -134,7 +151,6 @@ static void w83627hf_pnp_set_resources(device_t dev) pnp_enter_ext_func_mode(dev); pnp_set_resources(dev); pnp_exit_ext_func_mode(dev); - } static void w83627hf_pnp_enable_resources(device_t dev) @@ -148,12 +164,10 @@ static void w83627hf_pnp_enable_resources(device_t dev) break; } pnp_exit_ext_func_mode(dev); - } static void w83627hf_pnp_enable(device_t dev) { - if (!dev->enabled) { pnp_enter_ext_func_mode(dev); @@ -177,7 +191,7 @@ static struct pnp_info pnp_dev_info[] = { { &ops, W83627HF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, { &ops, W83627HF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, { &ops, W83627HF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - // No 4 { 0,}, + /* No 4 { 0,}, */ { &ops, W83627HF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, { &ops, W83627HF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, { &ops, W83627HF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 0x4}, }, diff --git a/src/superio/winbond/w83627hf/w83627hf.h b/src/superio/winbond/w83627hf/w83627hf.h index 21af050268d9..56ade8feee7d 100644 --- a/src/superio/winbond/w83627hf/w83627hf.h +++ b/src/superio/winbond/w83627hf/w83627hf.h @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #define W83627HF_FDC 0 /* Floppy */ #define W83627HF_PP 1 /* Parallel Port */ #define W83627HF_SP1 2 /* Com1 */ @@ -10,8 +32,8 @@ #define W83627HF_ACPI 10 #define W83627HF_HWM 11 /* Hardware Monitor */ -//#define W83627HF_GPIO_DEV PNP_DEV(0x2e, W83627HF_GPIO) -//#define W83627HF_XBUS_DEV PNP_DEV(0x2e, W83627HF_XBUS) +/* #define W83627HF_GPIO_DEV PNP_DEV(0x2e, W83627HF_GPIO) */ +/* #define W83627HF_XBUS_DEV PNP_DEV(0x2e, W83627HF_XBUS) */ #define W83627HF_GPSEL 0xf0 #define W83627HF_GPCFG1 0xf1 @@ -87,5 +109,3 @@ #define W83627HF_HAP1 0x14 #define W83627HF_XSCNF 0x15 #define W83627HF_XWBCNF 0x16 - - diff --git a/src/superio/winbond/w83627hf/w83627hf_early_init.c b/src/superio/winbond/w83627hf/w83627hf_early_init.c index e449c4ae9cd0..1f580524e22d 100644 --- a/src/superio/winbond/w83627hf/w83627hf_early_init.c +++ b/src/superio/winbond/w83627hf/w83627hf_early_init.c @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright 2003-2004 Linux Networx + * Copyright 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <arch/romcc_io.h> #include "w83627hf.h" @@ -6,6 +28,7 @@ static void w83627hf_disable_dev(device_t dev) pnp_set_logical_device(dev); pnp_set_enable(dev, 0); } + static void w83627hf_enable_dev(device_t dev, unsigned iobase) { pnp_set_logical_device(dev); diff --git a/src/superio/winbond/w83627hf/w83627hf_early_serial.c b/src/superio/winbond/w83627hf/w83627hf_early_serial.c index 826937e59e6d..cc0bf1cfe4e7 100644 --- a/src/superio/winbond/w83627hf/w83627hf_early_serial.c +++ b/src/superio/winbond/w83627hf/w83627hf_early_serial.c @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <arch/romcc_io.h> #include "w83627hf.h" diff --git a/src/superio/winbond/w83627thf/Config.lb b/src/superio/winbond/w83627thf/Config.lb index f62a567d6147..5f1320d8656c 100644 --- a/src/superio/winbond/w83627thf/Config.lb +++ b/src/superio/winbond/w83627thf/Config.lb @@ -1,2 +1,24 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## Copyright (C) 2004 Tyan By LYH change from PC87360 +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + config chip.h object superio.o diff --git a/src/superio/winbond/w83627thf/Makefile.inc b/src/superio/winbond/w83627thf/Makefile.inc index 6a222c046fab..05ef349f6992 100644 --- a/src/superio/winbond/w83627thf/Makefile.inc +++ b/src/superio/winbond/w83627thf/Makefile.inc @@ -1,2 +1,24 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## Copyright (C) 2004 Tyan By LYH change from PC87360 +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_WINBOND_W83627THF) += superio.o diff --git a/src/superio/winbond/w83627thf/chip.h b/src/superio/winbond/w83627thf/chip.h index ca52519e37e9..6f45535fa580 100644 --- a/src/superio/winbond/w83627thf/chip.h +++ b/src/superio/winbond/w83627thf/chip.h @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/winbond/w83627thf/superio.c b/src/superio/winbond/w83627thf/superio.c index 8fb138d5d768..8e32a2a4e889 100644 --- a/src/superio/winbond/w83627thf/superio.c +++ b/src/superio/winbond/w83627thf/superio.c @@ -1,8 +1,24 @@ -/* Copyright 2000 AG Electronics Ltd. */ -/* Copyright 2003-2004 Linux Networx */ -/* Copyright 2004 Tyan - By LYH change from PC87360 */ -/* This code is distributed without warranty under the GPL v2 (see COPYING) */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ #include <arch/io.h> #include <device/device.h> @@ -16,14 +32,15 @@ #include "chip.h" #include "w83627thf.h" -static void w83627thf_enter_ext_func_mode(device_t dev) +static void w83627thf_enter_ext_func_mode(device_t dev) { - outb(0x87, dev->path.pnp.port); - outb(0x87, dev->path.pnp.port); + outb(0x87, dev->path.pnp.port); + outb(0x87, dev->path.pnp.port); } -static void w83627thf_exit_ext_func_mode(device_t dev) + +static void w83627thf_exit_ext_func_mode(device_t dev) { - outb(0xaa, dev->path.pnp.port); + outb(0xaa, dev->path.pnp.port); } static void w83627thf_init(device_t dev) @@ -38,7 +55,7 @@ static void w83627thf_init(device_t dev) } conf = dev->chip_info; switch(dev->path.pnp.device) { - case W83627THF_SP1: + case W83627THF_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); break; @@ -70,12 +87,11 @@ static void w83627thf_enable_resources(device_t dev) static void w83627thf_enable(device_t dev) { - w83627thf_enter_ext_func_mode(dev); + w83627thf_enter_ext_func_mode(dev); pnp_enable(dev); - w83627thf_exit_ext_func_mode(dev); + w83627thf_exit_ext_func_mode(dev); } - static struct device_operations ops = { .read_resources = pnp_read_resources, .set_resources = w83627thf_set_resources, @@ -85,18 +101,18 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, W83627THF_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, W83627THF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, W83627THF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, W83627THF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - // No 4 { 0,}, - { &ops, W83627THF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, - { &ops, W83627THF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, W83627THF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} }, - // { W83627THF_GPIO2,}, - // { W83627THF_GPIO3,}, - { &ops, W83627THF_ACPI, PNP_IRQ0, }, - { &ops, W83627THF_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } }, + { &ops, W83627THF_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, W83627THF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, W83627THF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, W83627THF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + /* No 4 { 0,}, */ + { &ops, W83627THF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, + { &ops, W83627THF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, W83627THF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} }, + /* { W83627THF_GPIO2,}, */ + /* { W83627THF_GPIO3,}, */ + { &ops, W83627THF_ACPI, PNP_IRQ0, }, + { &ops, W83627THF_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } }, }; static void enable_dev(device_t dev) diff --git a/src/superio/winbond/w83627thf/w83627thf.h b/src/superio/winbond/w83627thf/w83627thf.h index c6c11b4e5cac..b92234b86b4b 100644 --- a/src/superio/winbond/w83627thf/w83627thf.h +++ b/src/superio/winbond/w83627thf/w83627thf.h @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #define W83627THF_FDC 0 /* Floppy */ #define W83627THF_PP 1 /* Parallel Port */ #define W83627THF_SP1 2 /* Com1 */ diff --git a/src/superio/winbond/w83627thf/w83627thf_early_serial.c b/src/superio/winbond/w83627thf/w83627thf_early_serial.c index 325d14dd1fb4..4931ad2da758 100644 --- a/src/superio/winbond/w83627thf/w83627thf_early_serial.c +++ b/src/superio/winbond/w83627thf/w83627thf_early_serial.c @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <arch/romcc_io.h> #include "w83627thf.h" diff --git a/src/superio/winbond/w83627thg/Config.lb b/src/superio/winbond/w83627thg/Config.lb index f62a567d6147..5f1320d8656c 100644 --- a/src/superio/winbond/w83627thg/Config.lb +++ b/src/superio/winbond/w83627thg/Config.lb @@ -1,2 +1,24 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## Copyright (C) 2004 Tyan By LYH change from PC87360 +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + config chip.h object superio.o diff --git a/src/superio/winbond/w83627thg/Makefile.inc b/src/superio/winbond/w83627thg/Makefile.inc index c14898fb1a48..e99032fdbb1c 100644 --- a/src/superio/winbond/w83627thg/Makefile.inc +++ b/src/superio/winbond/w83627thg/Makefile.inc @@ -1,2 +1,24 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## Copyright (C) 2004 Tyan By LYH change from PC87360 +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_WINBOND_W83627THG) += superio.o diff --git a/src/superio/winbond/w83627thg/chip.h b/src/superio/winbond/w83627thg/chip.h index 8b0bdbc91bbb..3decc8471333 100644 --- a/src/superio/winbond/w83627thg/chip.h +++ b/src/superio/winbond/w83627thg/chip.h @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/winbond/w83627thg/superio.c b/src/superio/winbond/w83627thg/superio.c index 01bb410df392..eabce5bb8193 100644 --- a/src/superio/winbond/w83627thg/superio.c +++ b/src/superio/winbond/w83627thg/superio.c @@ -1,8 +1,24 @@ -/* Copyright 2000 AG Electronics Ltd. */ -/* Copyright 2003-2004 Linux Networx */ -/* Copyright 2004 Tyan - By LYH change from PC87360 */ -/* This code is distributed without warranty under the GPL v2 (see COPYING) */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ #include <arch/io.h> #include <device/device.h> @@ -15,14 +31,14 @@ #include "chip.h" #include "w83627thg.h" -static void w83627thg_enter_ext_func_mode(device_t dev) +static void w83627thg_enter_ext_func_mode(device_t dev) { - outb(0x87, dev->path.pnp.port); - outb(0x87, dev->path.pnp.port); + outb(0x87, dev->path.pnp.port); + outb(0x87, dev->path.pnp.port); } -static void w83627thg_exit_ext_func_mode(device_t dev) +static void w83627thg_exit_ext_func_mode(device_t dev) { - outb(0xaa, dev->path.pnp.port); + outb(0xaa, dev->path.pnp.port); } static void w83627thg_init(device_t dev) @@ -37,7 +53,7 @@ static void w83627thg_init(device_t dev) } conf = dev->chip_info; switch(dev->path.pnp.device) { - case W83627THG_SP1: + case W83627THG_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); break; @@ -69,12 +85,11 @@ static void w83627thg_enable_resources(device_t dev) static void w83627thg_enable(device_t dev) { - w83627thg_enter_ext_func_mode(dev); + w83627thg_enter_ext_func_mode(dev); pnp_enable(dev); - w83627thg_exit_ext_func_mode(dev); + w83627thg_exit_ext_func_mode(dev); } - static struct device_operations ops = { .read_resources = pnp_read_resources, .set_resources = w83627thg_set_resources, @@ -84,17 +99,17 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, W83627THG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, W83627THG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, W83627THG_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, W83627THG_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - // No 4 { 0,}, - { &ops, W83627THG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, - { &ops, W83627THG_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} }, - { &ops, W83627THG_GPIO2,}, - { &ops, W83627THG_GPIO3,}, - { &ops, W83627THG_ACPI, PNP_IRQ0, }, - { &ops, W83627THG_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } }, + { &ops, W83627THG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, W83627THG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, W83627THG_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, W83627THG_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + /* No 4 { 0,}, */ + { &ops, W83627THG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, + { &ops, W83627THG_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} }, + { &ops, W83627THG_GPIO2,}, + { &ops, W83627THG_GPIO3,}, + { &ops, W83627THG_ACPI, PNP_IRQ0, }, + { &ops, W83627THG_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } }, }; static void enable_dev(device_t dev) diff --git a/src/superio/winbond/w83627thg/w83627thg.h b/src/superio/winbond/w83627thg/w83627thg.h index add928d66ac4..3456f80f4242 100644 --- a/src/superio/winbond/w83627thg/w83627thg.h +++ b/src/superio/winbond/w83627thg/w83627thg.h @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #define W83627THG_FDC 0 /* Floppy */ #define W83627THG_PP 1 /* Parallel Port */ #define W83627THG_SP1 2 /* Com1 */ diff --git a/src/superio/winbond/w83627thg/w83627thg_early_serial.c b/src/superio/winbond/w83627thg/w83627thg_early_serial.c index 328aead94f11..00af2ee5bba6 100644 --- a/src/superio/winbond/w83627thg/w83627thg_early_serial.c +++ b/src/superio/winbond/w83627thg/w83627thg_early_serial.c @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <arch/romcc_io.h> #include "w83627thg.h" diff --git a/src/superio/winbond/w83627uhg/superio.c b/src/superio/winbond/w83627uhg/superio.c index e6b6375513f5..4fc1cc559ea1 100644 --- a/src/superio/winbond/w83627uhg/superio.c +++ b/src/superio/winbond/w83627uhg/superio.c @@ -80,7 +80,7 @@ static void w83627uhg_init(device_t dev) conf = dev->chip_info; switch(dev->path.pnp.device) { - case W83627UHG_SP1: + case W83627UHG_SP1: res0 = find_resource(dev, PNP_IDX_IO0); /* set_uart_clock_source(dev, 0); */ init_uart8250(res0->base, &conf->com1); diff --git a/src/superio/winbond/w83697hf/w83697hf_early_serial.c b/src/superio/winbond/w83697hf/w83697hf_early_serial.c index 858dc6c72ab5..1e05e38f4048 100644 --- a/src/superio/winbond/w83697hf/w83697hf_early_serial.c +++ b/src/superio/winbond/w83697hf/w83697hf_early_serial.c @@ -29,7 +29,7 @@ static inline void pnp_enter_ext_func_mode(device_t dev) outb(0x87, port); } -static void pnp_exit_ext_func_mode(device_t dev) +static void pnp_exit_ext_func_mode(device_t dev) { u16 port = dev >> 8; outb(0xaa, port); diff --git a/src/superio/winbond/w83977f/Config.lb b/src/superio/winbond/w83977f/Config.lb index 75f0e26b5cf3..955a21e6f2e3 100644 --- a/src/superio/winbond/w83977f/Config.lb +++ b/src/superio/winbond/w83977f/Config.lb @@ -1,22 +1,22 @@ -## +## ## This file is part of the coreboot project. -## +## ## Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com> -## +## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. -## +## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. -## +## ## You should have received a copy of the GNU General Public License ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## +## config chip.h object superio.o diff --git a/src/superio/winbond/w83977f/Makefile.inc b/src/superio/winbond/w83977f/Makefile.inc index 2a91ad0a16f3..7e239b3b5d14 100644 --- a/src/superio/winbond/w83977f/Makefile.inc +++ b/src/superio/winbond/w83977f/Makefile.inc @@ -1,22 +1,22 @@ -## +## ## This file is part of the coreboot project. -## +## ## Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com> -## +## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. -## +## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. -## +## ## You should have received a copy of the GNU General Public License ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## +## #config chip.h obj-$(CONFIG_SUPERIO_WINBOND_W83977F) += superio.o diff --git a/src/superio/winbond/w83977f/superio.c b/src/superio/winbond/w83977f/superio.c index 0230e5820178..d9e9c3f4df7d 100644 --- a/src/superio/winbond/w83977f/superio.c +++ b/src/superio/winbond/w83977f/superio.c @@ -30,12 +30,12 @@ #include "chip.h" #include "w83977f.h" -static void w83977f_enter_ext_func_mode(device_t dev) +static void w83977f_enter_ext_func_mode(device_t dev) { outb(0x87, dev->path.pnp.port); outb(0x87, dev->path.pnp.port); } -static void w83977f_exit_ext_func_mode(device_t dev) +static void w83977f_exit_ext_func_mode(device_t dev) { outb(0xaa, dev->path.pnp.port); } diff --git a/src/superio/winbond/w83977tf/Config.lb b/src/superio/winbond/w83977tf/Config.lb index f62a567d6147..5f1320d8656c 100644 --- a/src/superio/winbond/w83977tf/Config.lb +++ b/src/superio/winbond/w83977tf/Config.lb @@ -1,2 +1,24 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## Copyright (C) 2004 Tyan By LYH change from PC87360 +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + config chip.h object superio.o diff --git a/src/superio/winbond/w83977tf/Makefile.inc b/src/superio/winbond/w83977tf/Makefile.inc index dc3cda711c1a..53e923127bb0 100644 --- a/src/superio/winbond/w83977tf/Makefile.inc +++ b/src/superio/winbond/w83977tf/Makefile.inc @@ -1,2 +1,24 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2000 AG Electronics Ltd. +## Copyright (C) 2003-2004 Linux Networx +## Copyright (C) 2004 Tyan By LYH change from PC87360 +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + #config chip.h obj-$(CONFIG_SUPERIO_WINBOND_W83977TF) += superio.o diff --git a/src/superio/winbond/w83977tf/chip.h b/src/superio/winbond/w83977tf/chip.h index 1957accf1aa0..62ed2833f24e 100644 --- a/src/superio/winbond/w83977tf/chip.h +++ b/src/superio/winbond/w83977tf/chip.h @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/winbond/w83977tf/superio.c b/src/superio/winbond/w83977tf/superio.c index 10985e7d7119..83dd90a982e3 100644 --- a/src/superio/winbond/w83977tf/superio.c +++ b/src/superio/winbond/w83977tf/superio.c @@ -1,11 +1,27 @@ -/* Copyright 2000 AG Electronics Ltd. */ -/* Copyright 2003-2004 Linux Networx */ -/* Copyright 2004 Tyan - By LYH change from PC87360 */ -/* This code is distributed without warranty under the GPL v2 (see COPYING) */ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ -/* 2006-4-24 - * Adapted for the w83977 by rsmith <smithbone@gmail.com> +/* 2006-4-24 + * Adapted for the w83977 by rsmith <smithbone@gmail.com> * This is mostly just a search and replace on the part type * TODO: Actually see if all the sub functionis exist and are * setup correctly. @@ -23,14 +39,14 @@ #include "chip.h" #include "w83977tf.h" -static void w83977tf_enter_ext_func_mode(device_t dev) +static void w83977tf_enter_ext_func_mode(device_t dev) { - outb(0x87, dev->path.pnp.port); - outb(0x87, dev->path.pnp.port); + outb(0x87, dev->path.pnp.port); + outb(0x87, dev->path.pnp.port); } -static void w83977tf_exit_ext_func_mode(device_t dev) +static void w83977tf_exit_ext_func_mode(device_t dev) { - outb(0xaa, dev->path.pnp.port); + outb(0xaa, dev->path.pnp.port); } static void w83977tf_init(device_t dev) @@ -45,7 +61,7 @@ static void w83977tf_init(device_t dev) } conf = dev->chip_info; switch(dev->path.pnp.device) { - case W83977TF_SP1: + case W83977TF_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); break; @@ -77,12 +93,11 @@ static void w83977tf_enable_resources(device_t dev) static void w83977tf_enable(device_t dev) { - w83977tf_enter_ext_func_mode(dev); + w83977tf_enter_ext_func_mode(dev); pnp_enable(dev); - w83977tf_exit_ext_func_mode(dev); + w83977tf_exit_ext_func_mode(dev); } - static struct device_operations ops = { .read_resources = pnp_read_resources, .set_resources = w83977tf_set_resources, @@ -92,15 +107,15 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, W83977TF_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, W83977TF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, W83977TF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, W83977TF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - // No 4 { 0,}, - { &ops, W83977TF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, - { &ops, W83977TF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, W83977TF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} }, - { &ops, W83977TF_ACPI, PNP_IRQ0, }, + { &ops, W83977TF_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, W83977TF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, W83977TF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, W83977TF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + /* No 4 { 0,}, */ + { &ops, W83977TF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, + { &ops, W83977TF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, W83977TF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} }, + { &ops, W83977TF_ACPI, PNP_IRQ0, }, }; static void enable_dev(device_t dev) diff --git a/src/superio/winbond/w83977tf/w83977tf.h b/src/superio/winbond/w83977tf/w83977tf.h index 76eec89ee1b5..c75fc8c8a0ff 100644 --- a/src/superio/winbond/w83977tf/w83977tf.h +++ b/src/superio/winbond/w83977tf/w83977tf.h @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #define W83977TF_FDC 0 /* Floppy */ #define W83977TF_PP 1 /* Parallel Port */ #define W83977TF_SP1 2 /* Com1 */ @@ -8,4 +30,3 @@ #define W83977TF_GPIO2 8 #define W83977TF_GPIO3 9 #define W83977TF_ACPI 10 - diff --git a/src/superio/winbond/w83977tf/w83977tf_early_serial.c b/src/superio/winbond/w83977tf/w83977tf_early_serial.c index a956e11fc5fe..dbc8dcbef120 100644 --- a/src/superio/winbond/w83977tf/w83977tf_early_serial.c +++ b/src/superio/winbond/w83977tf/w83977tf_early_serial.c @@ -1,3 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000 AG Electronics Ltd. + * Copyright (C) 2003-2004 Linux Networx + * Copyright (C) 2004 Tyan By LYH change from PC87360 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #include <arch/romcc_io.h> #include "w83977tf.h" |