diff options
| author | Scott Chao <scott_chao@wistron.corp-partner.google.com> | 2023-02-21 13:10:55 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-04 02:05:22 +0000 |
| commit | a5517786c2d38ea5d87ea8182dc3f2644c7e2618 (patch) | |
| tree | b516d8e948907fddaa20f729419b99d4857debd9 | |
| parent | 40e1cce7e1b62f5c4152664325776453275f6d4e (diff) | |
| download | coreboot-a5517786c2d38ea5d87ea8182dc3f2644c7e2618.tar.gz coreboot-a5517786c2d38ea5d87ea8182dc3f2644c7e2618.tar.bz2 coreboot-a5517786c2d38ea5d87ea8182dc3f2644c7e2618.zip | |
mb/google/brask/var/moli: Allow USB2/3 wakeups to (un)plug events in dt
BUG=b:230398487
BRANCH=none
TEST=Verify USB-A device could wake up Moli.
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: I1c8daf62dabe674a39b1416d886f9e470ae23a5b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73174
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/google/brya/variants/moli/overridetree.cb | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb index 2c13c6420e80..ded70f2f509a 100644 --- a/src/mainboard/google/brya/variants/moli/overridetree.cb +++ b/src/mainboard/google/brya/variants/moli/overridetree.cb @@ -36,6 +36,17 @@ chip soc/intel/alderlake .tx_downscale_amp = 0x00, }" # Type-A port A2 register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable TCP3 + + # Bitmap for Wake Enable on USB attach/detach + register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(4) | \ + USB_PORT_WAKE_ENABLE(6) | \ + USB_PORT_WAKE_ENABLE(7) | \ + USB_PORT_WAKE_ENABLE(8)" + register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(2) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(4)" + register "tcc_offset" = "0" # TCC of 100C register "power_limits_config[ADL_P_142_242_282_15W_CORE]" = "{ .tdp_pl1_override = 55, |