diff options
author | Aaron Durbin <adurbin@chromium.org> | 2020-08-17 09:37:13 -0600 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2020-08-18 15:57:40 +0000 |
commit | aa902036d0cc8dd48a36fd7cf5fd8e22930b7afd (patch) | |
tree | 7166ac3a7f6aa8e2a56e97cca9e73e78859adeee | |
parent | 819d676fed535c80d68247ed938a6559ff1c7d10 (diff) | |
download | coreboot-aa902036d0cc8dd48a36fd7cf5fd8e22930b7afd.tar.gz coreboot-aa902036d0cc8dd48a36fd7cf5fd8e22930b7afd.tar.bz2 coreboot-aa902036d0cc8dd48a36fd7cf5fd8e22930b7afd.zip |
elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE
The wake source macro for GPE events was using 'GPIO'. However,
current usage is really all GPEs. Therefore, provide clarity
in the naming in order to allow for proper GPIO wake events
that are separate from the ACPI GPE block.
BUG=b:159947207
Change-Id: I27d0ab439c58b1658ed39158eddb1213c24d328f
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44527
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r-- | src/include/elog.h | 2 | ||||
-rw-r--r-- | src/soc/amd/common/block/acpi/acpi.c | 2 | ||||
-rw-r--r-- | src/soc/intel/apollolake/elog.c | 2 | ||||
-rw-r--r-- | src/soc/intel/baytrail/elog.c | 2 | ||||
-rw-r--r-- | src/soc/intel/braswell/elog.c | 2 | ||||
-rw-r--r-- | src/soc/intel/broadwell/elog.c | 4 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/elog.c | 2 | ||||
-rw-r--r-- | src/soc/intel/icelake/elog.c | 2 | ||||
-rw-r--r-- | src/soc/intel/jasperlake/elog.c | 2 | ||||
-rw-r--r-- | src/soc/intel/skylake/elog.c | 2 | ||||
-rw-r--r-- | src/soc/intel/tigerlake/elog.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/bd82x6x/elog.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/lynxpoint/elog.c | 6 |
13 files changed, 16 insertions, 16 deletions
diff --git a/src/include/elog.h b/src/include/elog.h index 6c2c5317cca0..89079dece513 100644 --- a/src/include/elog.h +++ b/src/include/elog.h @@ -79,7 +79,7 @@ #define ELOG_WAKE_SOURCE_PME 0x01 #define ELOG_WAKE_SOURCE_PME_INTERNAL 0x02 #define ELOG_WAKE_SOURCE_RTC 0x03 -#define ELOG_WAKE_SOURCE_GPIO 0x04 +#define ELOG_WAKE_SOURCE_GPE 0x04 #define ELOG_WAKE_SOURCE_SMBUS 0x05 #define ELOG_WAKE_SOURCE_PWRBTN 0x06 #define ELOG_WAKE_SOURCE_PME_HDA 0x07 diff --git a/src/soc/amd/common/block/acpi/acpi.c b/src/soc/amd/common/block/acpi/acpi.c index 2d75ec0e94ef..4ca65995368d 100644 --- a/src/soc/amd/common/block/acpi/acpi.c +++ b/src/soc/amd/common/block/acpi/acpi.c @@ -90,7 +90,7 @@ static void log_gpe_events(const struct acpi_pm_gpe_state *state) for (i = 0; i <= 31; i++) { if (valid_gpe & (1U << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i); } } diff --git a/src/soc/intel/apollolake/elog.c b/src/soc/intel/apollolake/elog.c index 408017f94032..3e82c32e696f 100644 --- a/src/soc/intel/apollolake/elog.c +++ b/src/soc/intel/apollolake/elog.c @@ -18,7 +18,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start) for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } } diff --git a/src/soc/intel/baytrail/elog.c b/src/soc/intel/baytrail/elog.c index 75c080d5b6b5..7e92e9037d7a 100644 --- a/src/soc/intel/baytrail/elog.c +++ b/src/soc/intel/baytrail/elog.c @@ -68,7 +68,7 @@ static void log_wake_events(const struct chipset_power_state *ps) i = 0; while (gpio_mask) { if (gpio_mask & gpe0_sts) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i); gpio_mask <<= 1; i++; } diff --git a/src/soc/intel/braswell/elog.c b/src/soc/intel/braswell/elog.c index 75c080d5b6b5..7e92e9037d7a 100644 --- a/src/soc/intel/braswell/elog.c +++ b/src/soc/intel/braswell/elog.c @@ -68,7 +68,7 @@ static void log_wake_events(const struct chipset_power_state *ps) i = 0; while (gpio_mask) { if (gpio_mask & gpe0_sts) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i); gpio_mask <<= 1; i++; } diff --git a/src/soc/intel/broadwell/elog.c b/src/soc/intel/broadwell/elog.c index f91895889690..9271e27872f5 100644 --- a/src/soc/intel/broadwell/elog.c +++ b/src/soc/intel/broadwell/elog.c @@ -16,7 +16,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start) for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } } @@ -48,7 +48,7 @@ static void pch_log_wake_source(struct chipset_power_state *ps) /* GPIO27 */ if (ps->gpe0_sts[GPE_STD] & GP27_STS) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, 27); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, 27); /* Log GPIO events in set 1-3 */ pch_log_gpio_gpe(ps->gpe0_sts[GPE_31_0], ps->gpe0_en[GPE_31_0], 0); diff --git a/src/soc/intel/cannonlake/elog.c b/src/soc/intel/cannonlake/elog.c index 9fa725e38879..3600d76d959a 100644 --- a/src/soc/intel/cannonlake/elog.c +++ b/src/soc/intel/cannonlake/elog.c @@ -97,7 +97,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start) for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } } diff --git a/src/soc/intel/icelake/elog.c b/src/soc/intel/icelake/elog.c index 4727fbf9f6c5..235dc6e3cf4c 100644 --- a/src/soc/intel/icelake/elog.c +++ b/src/soc/intel/icelake/elog.c @@ -16,7 +16,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start) for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } } diff --git a/src/soc/intel/jasperlake/elog.c b/src/soc/intel/jasperlake/elog.c index 4727fbf9f6c5..235dc6e3cf4c 100644 --- a/src/soc/intel/jasperlake/elog.c +++ b/src/soc/intel/jasperlake/elog.c @@ -16,7 +16,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start) for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } } diff --git a/src/soc/intel/skylake/elog.c b/src/soc/intel/skylake/elog.c index 550ee4180541..dee93d889b47 100644 --- a/src/soc/intel/skylake/elog.c +++ b/src/soc/intel/skylake/elog.c @@ -22,7 +22,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start) for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } } diff --git a/src/soc/intel/tigerlake/elog.c b/src/soc/intel/tigerlake/elog.c index b38d316defaa..84f0a7ed4fff 100644 --- a/src/soc/intel/tigerlake/elog.c +++ b/src/soc/intel/tigerlake/elog.c @@ -16,7 +16,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start) for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } } diff --git a/src/southbridge/intel/bd82x6x/elog.c b/src/southbridge/intel/bd82x6x/elog.c index c130958191c3..684f830a9bd6 100644 --- a/src/southbridge/intel/bd82x6x/elog.c +++ b/src/southbridge/intel/bd82x6x/elog.c @@ -87,7 +87,7 @@ void pch_log_state(void) /* GPIO 0-15 */ for (i = 0; i < 16; i++) { if ((gpe0_sts & (1 << (16+i))) && (gpe0_en & (1 << (16+i)))) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i); } /* SMBUS Wake */ diff --git a/src/southbridge/intel/lynxpoint/elog.c b/src/southbridge/intel/lynxpoint/elog.c index 2e4df72658fa..8146794aa37a 100644 --- a/src/southbridge/intel/lynxpoint/elog.c +++ b/src/southbridge/intel/lynxpoint/elog.c @@ -36,7 +36,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts_reg, u32 gpe0_en_reg, int start) for (i = 0; i <= 31; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start); } } @@ -64,7 +64,7 @@ static void pch_log_gpe(void) gpe0_sts = inw(pmbase + GPE0_STS + 2) & gpe0_en; for (i = 0; i <= 15; i++) { if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i); + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i); } /* @@ -78,7 +78,7 @@ static void pch_log_gpe(void) if (!gpe0_high_gpios[i]) continue; if (gpe0_sts & (1 << i)) - elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, + elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, gpe0_high_gpios[i]); } } |