mb/google/auron: Drop `spd.h` from variants

Factor out common DRAM SPD definitions and relocate SPD GPIO macros.
Also factor out common function definition. Drop now-empty headers.

Change-Id: Id05ba6c9cea27fbad5ee831f033d0de43717847e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49770
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>

14 files changed, 47 insertions, 148 deletions

diff --git a/src/mainboard/google/auron/romstage.c b/src/mainboard/google/auron/romstage.c
index ed1780050ac0..a10314e4b487 100644
--- a/src/mainboard/google/auron/romstage.c
+++ b/src/mainboard/google/auron/romstage.c
@@ -5,7 +5,6 @@
 #include <soc/pei_data.h>
 #include <soc/pei_wrapper.h>
 #include <soc/romstage.h>
-#include <variant/spd.h>
 #include "variant.h"
 
 __weak void variant_romstage_entry(struct romstage_params *rp)
diff --git a/src/mainboard/google/auron/variant.h b/src/mainboard/google/auron/variant.h
index 095096b27d33..14acee98d79a 100644
--- a/src/mainboard/google/auron/variant.h
+++ b/src/mainboard/google/auron/variant.h
@@ -11,4 +11,18 @@ int variant_smbios_data(struct device *dev, int *handle,
 void variant_romstage_entry(struct romstage_params *rp);
 void lan_init(void);
 
+void mainboard_fill_spd_data(struct pei_data *pei_data);
+
+#define SPD_LEN			256
+
+#define SPD_DRAM_TYPE		2
+#define SPD_DRAM_DDR3		0x0b
+#define SPD_DRAM_LPDDR3		0xf1
+#define SPD_DENSITY_BANKS	4
+#define SPD_ADDRESSING		5
+#define SPD_ORGANIZATION	7
+#define SPD_BUS_DEV_WIDTH	8
+#define SPD_PART_OFF		128
+#define SPD_PART_LEN		18
+
 #endif
diff --git a/src/mainboard/google/auron/variants/auron_paine/include/variant/spd.h b/src/mainboard/google/auron/variants/auron_paine/include/variant/spd.h
deleted file mode 100644
index 74e3cdffde64..000000000000
--- a/src/mainboard/google/auron/variants/auron_paine/include/variant/spd.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef MAINBOARD_SPD_H
-#define MAINBOARD_SPD_H
-
-#define SPD_LEN			256
-
-#define SPD_DRAM_TYPE		2
-#define SPD_DRAM_DDR3		0x0b
-#define SPD_DRAM_LPDDR3		0xf1
-#define SPD_DENSITY_BANKS	4
-#define SPD_ADDRESSING		5
-#define SPD_ORGANIZATION	7
-#define SPD_BUS_DEV_WIDTH	8
-#define SPD_PART_OFF		128
-#define SPD_PART_LEN		18
-
-/* Auron board memory configuration GPIOs */
-#define SPD_GPIO_BIT0		13
-#define SPD_GPIO_BIT1		9
-#define SPD_GPIO_BIT2		47
-
-struct pei_data;
-void mainboard_fill_spd_data(struct pei_data *pei_data);
-
-#endif
diff --git a/src/mainboard/google/auron/variants/auron_paine/spd/spd.c b/src/mainboard/google/auron/variants/auron_paine/spd/spd.c
index 12a9d7cb12a5..347688bff201 100644
--- a/src/mainboard/google/auron/variants/auron_paine/spd/spd.c
+++ b/src/mainboard/google/auron/variants/auron_paine/spd/spd.c
@@ -9,7 +9,12 @@
 #include <soc/romstage.h>
 #include <ec/google/chromeec/ec.h>
 #include <mainboard/google/auron/ec.h>
-#include <variant/spd.h>
+#include <mainboard/google/auron/variant.h>
+
+/* Auron board memory configuration GPIOs */
+#define SPD_GPIO_BIT0		13
+#define SPD_GPIO_BIT1		9
+#define SPD_GPIO_BIT2		47
 
 static void mainboard_print_spd_info(uint8_t spd[])
 {
diff --git a/src/mainboard/google/auron/variants/auron_yuna/include/variant/spd.h b/src/mainboard/google/auron/variants/auron_yuna/include/variant/spd.h
deleted file mode 100644
index 74e3cdffde64..000000000000
--- a/src/mainboard/google/auron/variants/auron_yuna/include/variant/spd.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef MAINBOARD_SPD_H
-#define MAINBOARD_SPD_H
-
-#define SPD_LEN			256
-
-#define SPD_DRAM_TYPE		2
-#define SPD_DRAM_DDR3		0x0b
-#define SPD_DRAM_LPDDR3		0xf1
-#define SPD_DENSITY_BANKS	4
-#define SPD_ADDRESSING		5
-#define SPD_ORGANIZATION	7
-#define SPD_BUS_DEV_WIDTH	8
-#define SPD_PART_OFF		128
-#define SPD_PART_LEN		18
-
-/* Auron board memory configuration GPIOs */
-#define SPD_GPIO_BIT0		13
-#define SPD_GPIO_BIT1		9
-#define SPD_GPIO_BIT2		47
-
-struct pei_data;
-void mainboard_fill_spd_data(struct pei_data *pei_data);
-
-#endif
diff --git a/src/mainboard/google/auron/variants/auron_yuna/spd/spd.c b/src/mainboard/google/auron/variants/auron_yuna/spd/spd.c
index 12a9d7cb12a5..347688bff201 100644
--- a/src/mainboard/google/auron/variants/auron_yuna/spd/spd.c
+++ b/src/mainboard/google/auron/variants/auron_yuna/spd/spd.c
@@ -9,7 +9,12 @@
 #include <soc/romstage.h>
 #include <ec/google/chromeec/ec.h>
 #include <mainboard/google/auron/ec.h>
-#include <variant/spd.h>
+#include <mainboard/google/auron/variant.h>
+
+/* Auron board memory configuration GPIOs */
+#define SPD_GPIO_BIT0		13
+#define SPD_GPIO_BIT1		9
+#define SPD_GPIO_BIT2		47
 
 static void mainboard_print_spd_info(uint8_t spd[])
 {
diff --git a/src/mainboard/google/auron/variants/buddy/include/variant/spd.h b/src/mainboard/google/auron/variants/buddy/include/variant/spd.h
deleted file mode 100644
index 5ebd8c233a26..000000000000
--- a/src/mainboard/google/auron/variants/buddy/include/variant/spd.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef MAINBOARD_SPD_H
-#define MAINBOARD_SPD_H
-
-struct pei_data;
-void mainboard_fill_spd_data(struct pei_data *pei_data);
-
-#endif
diff --git a/src/mainboard/google/auron/variants/buddy/spd/spd.c b/src/mainboard/google/auron/variants/buddy/spd/spd.c
index 4dd1de6a799e..9a5480e2be56 100644
--- a/src/mainboard/google/auron/variants/buddy/spd/spd.c
+++ b/src/mainboard/google/auron/variants/buddy/spd/spd.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <mainboard/google/auron/variant.h>
 #include <soc/pei_data.h>
-#include <variant/spd.h>
 
 /* Copy SPD data for on-board memory */
 void mainboard_fill_spd_data(struct pei_data *pei_data)
diff --git a/src/mainboard/google/auron/variants/gandof/include/variant/spd.h b/src/mainboard/google/auron/variants/gandof/include/variant/spd.h
deleted file mode 100644
index 2263672e8c01..000000000000
--- a/src/mainboard/google/auron/variants/gandof/include/variant/spd.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef MAINBOARD_SPD_H
-#define MAINBOARD_SPD_H
-
-#define SPD_LEN			256
-
-#define SPD_DRAM_TYPE		2
-#define SPD_DRAM_DDR3		0x0b
-#define SPD_DRAM_LPDDR3		0xf1
-#define SPD_DENSITY_BANKS	4
-#define SPD_ADDRESSING		5
-#define SPD_ORGANIZATION	7
-#define SPD_BUS_DEV_WIDTH	8
-#define SPD_PART_OFF		128
-#define SPD_PART_LEN		18
-
-/* Gandof board memory configuration GPIOs */
-#define SPD_GPIO_BIT0		13
-#define SPD_GPIO_BIT1		9
-#define SPD_GPIO_BIT2		47
-
-struct pei_data;
-void mainboard_fill_spd_data(struct pei_data *pei_data);
-
-#endif
diff --git a/src/mainboard/google/auron/variants/gandof/spd/spd.c b/src/mainboard/google/auron/variants/gandof/spd/spd.c
index 12a9d7cb12a5..b16e54589966 100644
--- a/src/mainboard/google/auron/variants/gandof/spd/spd.c
+++ b/src/mainboard/google/auron/variants/gandof/spd/spd.c
@@ -9,7 +9,12 @@
 #include <soc/romstage.h>
 #include <ec/google/chromeec/ec.h>
 #include <mainboard/google/auron/ec.h>
-#include <variant/spd.h>
+#include <mainboard/google/auron/variant.h>
+
+/* Gandof board memory configuration GPIOs */
+#define SPD_GPIO_BIT0		13
+#define SPD_GPIO_BIT1		9
+#define SPD_GPIO_BIT2		47
 
 static void mainboard_print_spd_info(uint8_t spd[])
 {
diff --git a/src/mainboard/google/auron/variants/lulu/include/variant/spd.h b/src/mainboard/google/auron/variants/lulu/include/variant/spd.h
deleted file mode 100644
index 903b60a545ab..000000000000
--- a/src/mainboard/google/auron/variants/lulu/include/variant/spd.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef MAINBOARD_SPD_H
-#define MAINBOARD_SPD_H
-
-#define SPD_LEN			256
-
-#define SPD_DRAM_TYPE		2
-#define SPD_DRAM_DDR3		0x0b
-#define SPD_DRAM_LPDDR3		0xf1
-#define SPD_DENSITY_BANKS	4
-#define SPD_ADDRESSING		5
-#define SPD_ORGANIZATION	7
-#define SPD_BUS_DEV_WIDTH	8
-#define SPD_PART_OFF		128
-#define SPD_PART_LEN		18
-
-/* Lulu board memory configuration GPIOs */
-#define SPD_GPIO_BIT0		13
-#define SPD_GPIO_BIT1		9
-#define SPD_GPIO_BIT2		47
-#define SPD_GPIO_BIT3		8
-
-struct pei_data;
-void mainboard_fill_spd_data(struct pei_data *pei_data);
-
-#endif
diff --git a/src/mainboard/google/auron/variants/lulu/spd/spd.c b/src/mainboard/google/auron/variants/lulu/spd/spd.c
index 905e196f7b57..2abf0a7bc7e4 100644
--- a/src/mainboard/google/auron/variants/lulu/spd/spd.c
+++ b/src/mainboard/google/auron/variants/lulu/spd/spd.c
@@ -9,7 +9,13 @@
 #include <soc/romstage.h>
 #include <ec/google/chromeec/ec.h>
 #include <mainboard/google/auron/ec.h>
-#include <variant/spd.h>
+#include <mainboard/google/auron/variant.h>
+
+/* Lulu board memory configuration GPIOs */
+#define SPD_GPIO_BIT0		13
+#define SPD_GPIO_BIT1		9
+#define SPD_GPIO_BIT2		47
+#define SPD_GPIO_BIT3		8
 
 static void mainboard_print_spd_info(uint8_t spd[])
 {
diff --git a/src/mainboard/google/auron/variants/samus/include/variant/spd.h b/src/mainboard/google/auron/variants/samus/include/variant/spd.h
deleted file mode 100644
index c9b04989c111..000000000000
--- a/src/mainboard/google/auron/variants/samus/include/variant/spd.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef MAINBOARD_SPD_H
-#define MAINBOARD_SPD_H
-
-#define SPD_LEN			256
-
-#define SPD_DRAM_TYPE		2
-#define SPD_DRAM_DDR3		0x0b
-#define SPD_DRAM_LPDDR3		0xf1
-#define SPD_DENSITY_BANKS	4
-#define SPD_ADDRESSING		5
-#define SPD_ORGANIZATION	7
-#define SPD_BUS_DEV_WIDTH	8
-#define SPD_PART_OFF		128
-#define SPD_PART_LEN		18
-
-/* Samus board memory configuration GPIOs */
-#define SPD_GPIO_BIT0		69
-#define SPD_GPIO_BIT1		68
-#define SPD_GPIO_BIT2		67
-#define SPD_GPIO_BIT3		65
-
-struct pei_data;
-void mainboard_fill_spd_data(struct pei_data *pei_data);
-
-#endif
diff --git a/src/mainboard/google/auron/variants/samus/spd/spd.c b/src/mainboard/google/auron/variants/samus/spd/spd.c
index 4cad47432c45..1b5ccb573a02 100644
--- a/src/mainboard/google/auron/variants/samus/spd/spd.c
+++ b/src/mainboard/google/auron/variants/samus/spd/spd.c
@@ -9,7 +9,13 @@
 #include <soc/romstage.h>
 #include <ec/google/chromeec/ec.h>
 #include <mainboard/google/auron/ec.h>
-#include <variant/spd.h>
+#include <mainboard/google/auron/variant.h>
+
+/* Samus board memory configuration GPIOs */
+#define SPD_GPIO_BIT0		69
+#define SPD_GPIO_BIT1		68
+#define SPD_GPIO_BIT2		67
+#define SPD_GPIO_BIT3		65
 
 static void mainboard_print_spd_info(uint8_t spd[])
 {