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| author | Angel Pons <th3fanbus@gmail.com> | 2021-08-30 10:33:50 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-03 00:12:37 +0000 |
| commit | b4d3a1436070e9388caed6fd0756b5009219f31d (patch) | |
| tree | 55b09e0c18f991acb3f6736ad43d1d34240135ea | |
| parent | 8f4098bb3dfa069ae330257c7cd677806634ea4a (diff) | |
| download | coreboot-b4d3a1436070e9388caed6fd0756b5009219f31d.tar.gz coreboot-b4d3a1436070e9388caed6fd0756b5009219f31d.tar.bz2 coreboot-b4d3a1436070e9388caed6fd0756b5009219f31d.zip | |
skylake: Default to `BOARD_TYPE_DESKTOP` for PCH-H
Set the `UserBd` FSP-M UPD to `BOARD_TYPE_DESKTOP` by default on PCH-H.
Remove now-redundant mainboard code to set the `UserBd` UPD.
Change-Id: I349abe5d89f562c158ce9baadbca2b2f56695846
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57261
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/asrock/h110m/romstage.c | 3 | ||||
| -rw-r--r-- | src/mainboard/hp/280_g2/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/intel/kblrvp/romstage.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/skylake/romstage/fsp_params.c | 5 |
4 files changed, 4 insertions, 6 deletions
diff --git a/src/mainboard/asrock/h110m/romstage.c b/src/mainboard/asrock/h110m/romstage.c index ca3058fa9ffb..f78aa30b21bc 100644 --- a/src/mainboard/asrock/h110m/romstage.c +++ b/src/mainboard/asrock/h110m/romstage.c @@ -33,7 +33,4 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) /* use virtual channel 1 for the dmi interface of the PCH */ mupd->FspmTestConfig.DmiVc1 = 1; - - /* desktop type */ - mem_cfg->UserBd = BOARD_TYPE_DESKTOP; } diff --git a/src/mainboard/hp/280_g2/romstage.c b/src/mainboard/hp/280_g2/romstage.c index 9b3d385b4203..130eb14f6dda 100644 --- a/src/mainboard/hp/280_g2/romstage.c +++ b/src/mainboard/hp/280_g2/romstage.c @@ -25,7 +25,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) mem_cfg->CaVrefConfig = 2; mem_cfg->DqPinsInterleaved = true; - mem_cfg->UserBd = BOARD_TYPE_DESKTOP; mem_cfg->MemorySpdDataLen = blk.len; mem_cfg->MemorySpdPtr00 = (u32)blk.spd_array[0]; diff --git a/src/mainboard/intel/kblrvp/romstage.c b/src/mainboard/intel/kblrvp/romstage.c index bc4c6de6612a..fb02f21edc63 100644 --- a/src/mainboard/intel/kblrvp/romstage.c +++ b/src/mainboard/intel/kblrvp/romstage.c @@ -50,7 +50,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) case BOARD_ID_KBL_RVP11: mem_cfg->MemorySpdPtr01 = (uintptr_t)blk.spd_array[1]; mem_cfg->MemorySpdPtr11 = (uintptr_t)blk.spd_array[3]; - mem_cfg->UserBd = BOARD_TYPE_DESKTOP; break; default: break; diff --git a/src/soc/intel/skylake/romstage/fsp_params.c b/src/soc/intel/skylake/romstage/fsp_params.c index 21526e4848fa..7af0a6eff2fe 100644 --- a/src/soc/intel/skylake/romstage/fsp_params.c +++ b/src/soc/intel/skylake/romstage/fsp_params.c @@ -82,7 +82,10 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, m_cfg->IedSize = CONFIG_IED_REGION_SIZE; m_cfg->ProbelessTrace = 0; m_cfg->SaGv = config->SaGv; - m_cfg->UserBd = BOARD_TYPE_ULT_ULX; + if (CONFIG(SKYLAKE_SOC_PCH_H)) + m_cfg->UserBd = BOARD_TYPE_DESKTOP; + else + m_cfg->UserBd = BOARD_TYPE_ULT_ULX; m_cfg->RMT = config->RMT; m_cfg->CmdTriStateDis = config->CmdTriStateDis; m_cfg->DdrFreqLimit = 0; |