soc/amd: move all AOAC function prototypes to amdblocks/aoac.h

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I3deae150cd1e20fff6507a0f0ba6a375fca430e5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68559
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>

12 files changed, 9 insertions, 13 deletions

diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c
index 4935f661db73..0b8e9a016159 100644
--- a/src/soc/amd/cezanne/early_fch.c
+++ b/src/soc/amd/cezanne/early_fch.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <amdblocks/acpimmio.h>
+#include <amdblocks/aoac.h>
 #include <amdblocks/espi.h>
 #include <amdblocks/i2c.h>
 #include <amdblocks/lpc.h>
diff --git a/src/soc/amd/cezanne/include/soc/southbridge.h b/src/soc/amd/cezanne/include/soc/southbridge.h
index 4e44b89fe4aa..4cd53cb5d152 100644
--- a/src/soc/amd/cezanne/include/soc/southbridge.h
+++ b/src/soc/amd/cezanne/include/soc/southbridge.h
@@ -118,7 +118,4 @@ void fch_early_init(void);
 void fch_init(void *chip_info);
 void fch_final(void *chip_info);
 
-void enable_aoac_devices(void);
-void wait_for_aoac_enabled(unsigned int dev);
-
 #endif /* AMD_CEZANNE_SOUTHBRIDGE_H */
diff --git a/src/soc/amd/common/block/include/amdblocks/aoac.h b/src/soc/amd/common/block/include/amdblocks/aoac.h
index 455f32d9e685..3944e2e584ff 100644
--- a/src/soc/amd/common/block/include/amdblocks/aoac.h
+++ b/src/soc/amd/common/block/include/amdblocks/aoac.h
@@ -35,5 +35,8 @@
 bool is_aoac_device_enabled(unsigned int dev);
 void power_on_aoac_device(unsigned int dev);
 void power_off_aoac_device(unsigned int dev);
+/* the following 2 functions are implemented in the SoC code */
+void enable_aoac_devices(void);
+void wait_for_aoac_enabled(unsigned int dev);
 
 #endif /* AMD_BLOCK_AOAC_H */
diff --git a/src/soc/amd/common/psp_verstage/fch.c b/src/soc/amd/common/psp_verstage/fch.c
index d4dcd21b3164..7f850fd1498f 100644
--- a/src/soc/amd/common/psp_verstage/fch.c
+++ b/src/soc/amd/common/psp_verstage/fch.c
@@ -3,6 +3,7 @@
 #include "psp_verstage.h"
 
 #include <amdblocks/acpimmio.h>
+#include <amdblocks/aoac.h>
 #include <amdblocks/espi.h>
 #include <amdblocks/i2c.h>
 #include <amdblocks/spi.h>
diff --git a/src/soc/amd/mendocino/early_fch.c b/src/soc/amd/mendocino/early_fch.c
index 333173717e40..a1cf908a4da7 100644
--- a/src/soc/amd/mendocino/early_fch.c
+++ b/src/soc/amd/mendocino/early_fch.c
@@ -3,6 +3,7 @@
 /* TODO: Check if this is still correct */
 
 #include <amdblocks/acpimmio.h>
+#include <amdblocks/aoac.h>
 #include <amdblocks/espi.h>
 #include <amdblocks/i2c.h>
 #include <amdblocks/lpc.h>
diff --git a/src/soc/amd/mendocino/include/soc/southbridge.h b/src/soc/amd/mendocino/include/soc/southbridge.h
index a5a1be47805b..52c2606a1d99 100644
--- a/src/soc/amd/mendocino/include/soc/southbridge.h
+++ b/src/soc/amd/mendocino/include/soc/southbridge.h
@@ -121,7 +121,4 @@ void fch_early_init(void);
 void fch_init(void *chip_info);
 void fch_final(void *chip_info);
 
-void enable_aoac_devices(void);
-void wait_for_aoac_enabled(unsigned int dev);
-
 #endif /* AMD_MENDOCINO_SOUTHBRIDGE_H */
diff --git a/src/soc/amd/morgana/early_fch.c b/src/soc/amd/morgana/early_fch.c
index 1ec71051fa5d..f940deaf3ba9 100644
--- a/src/soc/amd/morgana/early_fch.c
+++ b/src/soc/amd/morgana/early_fch.c
@@ -3,6 +3,7 @@
 /* TODO: Update for Morgana */
 
 #include <amdblocks/acpimmio.h>
+#include <amdblocks/aoac.h>
 #include <amdblocks/espi.h>
 #include <amdblocks/i2c.h>
 #include <amdblocks/lpc.h>
diff --git a/src/soc/amd/morgana/include/soc/southbridge.h b/src/soc/amd/morgana/include/soc/southbridge.h
index 75f0beb72fa7..216bf4267741 100644
--- a/src/soc/amd/morgana/include/soc/southbridge.h
+++ b/src/soc/amd/morgana/include/soc/southbridge.h
@@ -121,7 +121,4 @@ void fch_early_init(void);
 void fch_init(void *chip_info);
 void fch_final(void *chip_info);
 
-void enable_aoac_devices(void);
-void wait_for_aoac_enabled(unsigned int dev);
-
 #endif /* AMD_MORGANA_SOUTHBRIDGE_H */
diff --git a/src/soc/amd/picasso/early_fch.c b/src/soc/amd/picasso/early_fch.c
index f5d392c9f601..e77f2963fdac 100644
--- a/src/soc/amd/picasso/early_fch.c
+++ b/src/soc/amd/picasso/early_fch.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <amdblocks/acpimmio.h>
+#include <amdblocks/aoac.h>
 #include <amdblocks/espi.h>
 #include <amdblocks/i2c.h>
 #include <amdblocks/lpc.h>
diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h
index b8dd67b5c704..a3fb1a2d7da5 100644
--- a/src/soc/amd/picasso/include/soc/southbridge.h
+++ b/src/soc/amd/picasso/include/soc/southbridge.h
@@ -107,7 +107,4 @@ void fch_early_init(void);
 void fch_init(void *chip_info);
 void fch_final(void *chip_info);
 
-void enable_aoac_devices(void);
-void wait_for_aoac_enabled(unsigned int dev);
-
 #endif /* AMD_PICASSO_SOUTHBRIDGE_H */
diff --git a/src/soc/amd/stoneyridge/early_fch.c b/src/soc/amd/stoneyridge/early_fch.c
index 763e3f29013a..5e2be614e0e7 100644
--- a/src/soc/amd/stoneyridge/early_fch.c
+++ b/src/soc/amd/stoneyridge/early_fch.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <amdblocks/acpimmio.h>
+#include <amdblocks/aoac.h>
 #include <amdblocks/i2c.h>
 #include <amdblocks/lpc.h>
 #include <amdblocks/pmlib.h>
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 32c102c50f88..26500efd0405 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -181,7 +181,6 @@ void bootblock_fch_init(void);
 void fch_init(void *chip_info);
 void fch_final(void *chip_info);
 
-void enable_aoac_devices(void);
 void fch_clk_output_48Mhz(u32 osc);
 
 void set_uart_config(unsigned int idx);