diff options
| author | Gaggery Tsai <gaggery.tsai@intel.com> | 2022-04-27 08:39:30 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-05 17:37:10 +0000 |
| commit | bd9cec8ae5755e898d107fd061fc2e2f983552b9 (patch) | |
| tree | 4a36470e1e248aa4089da4a40e44f0faf2166485 | |
| parent | 405c73005f81929fbf5b4639beee055fe0e8b85e (diff) | |
| download | coreboot-bd9cec8ae5755e898d107fd061fc2e2f983552b9.tar.gz coreboot-bd9cec8ae5755e898d107fd061fc2e2f983552b9.tar.bz2 coreboot-bd9cec8ae5755e898d107fd061fc2e2f983552b9.zip | |
mb/google/brya/var/vell: Remove unused i2c7 settings
This patch removes unused i2c7 settings. Accroding to EVT schematic,
i2c7 is reserved for AMP but resistors are unstuffing.
BUG=b:229334701
TEST=emerge-brya coreboot chromeos-bootimage && $powerd_dbus_suspend
&& checks EC log and ensures the DUT could enter s0ix.
Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com>
Change-Id: Ifc1e0085064a13149ebc7e70184d1f40462e0fff
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63892
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Robert Chen <robert.chen@quanta.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
| -rw-r--r-- | src/mainboard/google/brya/variants/vell/gpio.c | 8 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/vell/overridetree.cb | 12 |
2 files changed, 5 insertions, 15 deletions
diff --git a/src/mainboard/google/brya/variants/vell/gpio.c b/src/mainboard/google/brya/variants/vell/gpio.c index 57f856400b81..a984a5a5ab4f 100644 --- a/src/mainboard/google/brya/variants/vell/gpio.c +++ b/src/mainboard/google/brya/variants/vell/gpio.c @@ -57,10 +57,10 @@ static const struct pad_config override_gpio_table[] = { PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG), /* H7 : IC1_SCL ==> PCH_I2C_TPM_SCL */ PAD_CFG_NF_LOCK(GPP_H7, NONE, NF1, LOCK_CONFIG), - /* H12 : I2C7_SDA ==> UWB_SDA */ - PAD_CFG_NF_LOCK(GPP_H12, NONE, NF1, LOCK_CONFIG), - /* H13 : I2C7_SCL ==> UWB_SCL */ - PAD_CFG_NF_LOCK(GPP_H13, NONE, NF1, LOCK_CONFIG), + /* H12 : Reserved I2C7_SDAL for AMP */ + PAD_NC(GPP_H12, NONE), + /* H13 : Reserved I2C7_SCL for AMP */ + PAD_NC(GPP_H13, NONE), /* H15 : DDPB_CTRLCLK ==> USB_C3_AUX_DC_P */ PAD_CFG_NF(GPP_H15, NONE, DEEP, NF6), /* H17 : DDPB_CTRLDATA ==> USB_C3_AUX_DC_N */ diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb index aa8350fdb9c2..c7f985cde3a9 100644 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -57,15 +57,6 @@ chip soc/intel/alderlake .fall_time_ns = 400, .data_hold_time_ns = 50, }, - .i2c[7] = { - .speed = I2C_SPEED_FAST_PLUS, - .speed_config[0] = { - .speed = I2C_SPEED_FAST_PLUS, - .scl_lcnt = 45, - .scl_hcnt = 30, - .sda_hold = 20, - }, - }, }" register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC3)" # USB2_C3 register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" @@ -83,7 +74,7 @@ chip soc/intel/alderlake [PchSerialIoIndexI2C3] = PchSerialIoPci, [PchSerialIoIndexI2C4] = PchSerialIoDisabled, [PchSerialIoIndexI2C5] = PchSerialIoPci, - [PchSerialIoIndexI2C7] = PchSerialIoPci, + [PchSerialIoIndexI2C7] = PchSerialIoDisabled, }" device domain 0 on device ref igpu on @@ -358,7 +349,6 @@ chip soc/intel/alderlake device i2c 15 on end end end - device ref i2c7 on end device ref gspi1 on chip drivers/spi/acpi register "name" = ""CRFP"" |