summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2019-10-20 19:39:20 +0200
committerFelix Held <felix-coreboot@felixheld.de>2019-10-21 14:21:09 +0000
commitbec78e32d6a35e3a28135e6094014705788cc04c (patch)
treef6f11c5fd30025995a9d7e1d2b15dace14177012
parent749c395f938675ecf5f53a03287ce0fd6379c2e7 (diff)
downloadcoreboot-bec78e32d6a35e3a28135e6094014705788cc04c.tar.gz
coreboot-bec78e32d6a35e3a28135e6094014705788cc04c.tar.bz2
coreboot-bec78e32d6a35e3a28135e6094014705788cc04c.zip
src/{device,drivers,mb,nb,soc,sb}: Remove unused 'include <console/console.h>'
Change-Id: I0c965e598e260ff8129aa07fb9fc5bf6e784e1d8 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36057 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
-rw-r--r--src/device/dram/ddr_common.c1
-rw-r--r--src/drivers/intel/wifi/wifi.c1
-rw-r--r--src/drivers/vpd/vpd_premem.c1
-rw-r--r--src/include/device/dram/common.h1
-rw-r--r--src/mainboard/google/hatch/variants/akemi/gpio.c1
-rw-r--r--src/mainboard/lenovo/x201/mainboard.c1
-rw-r--r--src/mainboard/msi/ms7707/romstage.c1
-rw-r--r--src/mainboard/packardbell/ms2290/mainboard.c1
-rw-r--r--src/northbridge/amd/amdht/comlib.c1
-rw-r--r--src/northbridge/intel/e7505/memmap.c1
-rw-r--r--src/northbridge/intel/haswell/memmap.c1
-rw-r--r--src/northbridge/intel/i440bx/memmap.c1
-rw-r--r--src/northbridge/intel/nehalem/memmap.c1
-rw-r--r--src/northbridge/intel/sandybridge/memmap.c1
-rw-r--r--src/soc/amd/picasso/chip.c1
-rw-r--r--src/soc/intel/apollolake/lpc.c1
-rw-r--r--src/soc/intel/apollolake/memmap.c1
-rw-r--r--src/soc/intel/common/block/chip/chip.c1
-rw-r--r--src/soc/intel/fsp_broadwell_de/smbus-imc.c1
-rw-r--r--src/soc/mediatek/mt8183/dsi.c1
-rw-r--r--src/soc/mediatek/mt8183/include/soc/spm.h1
-rw-r--r--src/soc/qualcomm/qcs405/uart.c1
-rw-r--r--src/soc/qualcomm/sdm845/qclib.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_pch.c1
-rw-r--r--src/southbridge/intel/i82801gx/pci.c1
-rw-r--r--src/southbridge/nvidia/ck804/early_setup_car.c1
26 files changed, 1 insertions, 25 deletions
diff --git a/src/device/dram/ddr_common.c b/src/device/dram/ddr_common.c
index bc87712ef61b..dcfa18df2ab2 100644
--- a/src/device/dram/ddr_common.c
+++ b/src/device/dram/ddr_common.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <console/console.h>
#include <device/dram/common.h>
#include <types.h>
diff --git a/src/drivers/intel/wifi/wifi.c b/src/drivers/intel/wifi/wifi.c
index 926905c26b1b..92b51c29d017 100644
--- a/src/drivers/intel/wifi/wifi.c
+++ b/src/drivers/intel/wifi/wifi.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/drivers/vpd/vpd_premem.c b/src/drivers/vpd/vpd_premem.c
index 14e803281a7a..b9525698271c 100644
--- a/src/drivers/vpd/vpd_premem.c
+++ b/src/drivers/vpd/vpd_premem.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <console/console.h>
#include <string.h>
#include "vpd.h"
diff --git a/src/include/device/dram/common.h b/src/include/device/dram/common.h
index 3d380c3c028b..e5fb53455128 100644
--- a/src/include/device/dram/common.h
+++ b/src/include/device/dram/common.h
@@ -18,6 +18,7 @@
#ifndef DEVICE_DRAM_COMMON_H
#define DEVICE_DRAM_COMMON_H
+#include <console/console.h>
#include <stdint.h>
/**
diff --git a/src/mainboard/google/hatch/variants/akemi/gpio.c b/src/mainboard/google/hatch/variants/akemi/gpio.c
index 1ba9d3523d40..4be3c34722c4 100644
--- a/src/mainboard/google/hatch/variants/akemi/gpio.c
+++ b/src/mainboard/google/hatch/variants/akemi/gpio.c
@@ -17,7 +17,6 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
-#include <console/console.h>
static const struct pad_config ssd_sku_gpio_table[] = {
/* A0 : NC */
diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c
index a57d863eb4d6..c021db185c27 100644
--- a/src/mainboard/lenovo/x201/mainboard.c
+++ b/src/mainboard/lenovo/x201/mainboard.c
@@ -16,7 +16,6 @@
* GNU General Public License for more details.
*/
-#include <console/console.h>
#include <device/device.h>
#include <device/pci_ops.h>
#include <ec/acpi/ec.h>
diff --git a/src/mainboard/msi/ms7707/romstage.c b/src/mainboard/msi/ms7707/romstage.c
index dc3b79d52718..a797f5099c04 100644
--- a/src/mainboard/msi/ms7707/romstage.c
+++ b/src/mainboard/msi/ms7707/romstage.c
@@ -18,7 +18,6 @@
#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/common/pmbase.h>
-#include <console/console.h>
#include <southbridge/intel/bd82x6x/pch.h>
void pch_enable_lpc(void)
diff --git a/src/mainboard/packardbell/ms2290/mainboard.c b/src/mainboard/packardbell/ms2290/mainboard.c
index 809ccea5979d..f64e9e34c89a 100644
--- a/src/mainboard/packardbell/ms2290/mainboard.c
+++ b/src/mainboard/packardbell/ms2290/mainboard.c
@@ -16,7 +16,6 @@
* GNU General Public License for more details.
*/
-#include <console/console.h>
#include <device/device.h>
#include <arch/io.h>
#include <device/pci_def.h>
diff --git a/src/northbridge/amd/amdht/comlib.c b/src/northbridge/amd/amdht/comlib.c
index b36d4b4fe96c..883f634c74cf 100644
--- a/src/northbridge/amd/amdht/comlib.c
+++ b/src/northbridge/amd/amdht/comlib.c
@@ -17,7 +17,6 @@
#include <device/pci.h>
#include <device/pci_ops.h>
-#include <console/console.h>
#include <cpu/amd/msr.h>
#include <device/pci_def.h>
diff --git a/src/northbridge/intel/e7505/memmap.c b/src/northbridge/intel/e7505/memmap.c
index 11af6e334f91..c6a20fab9d27 100644
--- a/src/northbridge/intel/e7505/memmap.c
+++ b/src/northbridge/intel/e7505/memmap.c
@@ -17,7 +17,6 @@
#include <device/pci_ops.h>
#include <arch/romstage.h>
#include <cbmem.h>
-#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <program_loading.h>
#include "e7505.h"
diff --git a/src/northbridge/intel/haswell/memmap.c b/src/northbridge/intel/haswell/memmap.c
index b1eb770f90e6..007a67d4b392 100644
--- a/src/northbridge/intel/haswell/memmap.c
+++ b/src/northbridge/intel/haswell/memmap.c
@@ -17,7 +17,6 @@
#define __SIMPLE_DEVICE__
#include <arch/romstage.h>
-#include <console/console.h>
#include <commonlib/helpers.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/smm.h>
diff --git a/src/northbridge/intel/i440bx/memmap.c b/src/northbridge/intel/i440bx/memmap.c
index 6c540a512af6..75a6c7e243bc 100644
--- a/src/northbridge/intel/i440bx/memmap.c
+++ b/src/northbridge/intel/i440bx/memmap.c
@@ -18,7 +18,6 @@
#include <arch/romstage.h>
#include <device/pci_ops.h>
#include <cbmem.h>
-#include <console/console.h>
#include <commonlib/helpers.h>
#include <cpu/x86/mtrr.h>
#include <program_loading.h>
diff --git a/src/northbridge/intel/nehalem/memmap.c b/src/northbridge/intel/nehalem/memmap.c
index fd10542832fe..1c17b0d9b589 100644
--- a/src/northbridge/intel/nehalem/memmap.c
+++ b/src/northbridge/intel/nehalem/memmap.c
@@ -19,7 +19,6 @@
#include <arch/romstage.h>
#include <device/pci_ops.h>
#include <cbmem.h>
-#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/smm.h>
#include <program_loading.h>
diff --git a/src/northbridge/intel/sandybridge/memmap.c b/src/northbridge/intel/sandybridge/memmap.c
index 95bf4584ed53..67de34459bf2 100644
--- a/src/northbridge/intel/sandybridge/memmap.c
+++ b/src/northbridge/intel/sandybridge/memmap.c
@@ -18,7 +18,6 @@
#include <arch/romstage.h>
#include <device/pci_ops.h>
#include <cbmem.h>
-#include <console/console.h>
#include <cpu/intel/smm_reloc.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c
index 8d4927101fa8..cf0203039121 100644
--- a/src/soc/amd/picasso/chip.c
+++ b/src/soc/amd/picasso/chip.c
@@ -14,7 +14,6 @@
*/
#include <bootstate.h>
-#include <console/console.h>
#include <cpu/amd/mtrr.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/apollolake/lpc.c b/src/soc/intel/apollolake/lpc.c
index 2d59f7de2240..636dd03a3e11 100644
--- a/src/soc/intel/apollolake/lpc.c
+++ b/src/soc/intel/apollolake/lpc.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <console/console.h>
#include <device/pci.h>
#include <intelblocks/lpc_lib.h>
#include <intelblocks/rtc.h>
diff --git a/src/soc/intel/apollolake/memmap.c b/src/soc/intel/apollolake/memmap.c
index 77711ebf2630..7b60270488c1 100644
--- a/src/soc/intel/apollolake/memmap.c
+++ b/src/soc/intel/apollolake/memmap.c
@@ -18,7 +18,6 @@
#include <arch/romstage.h>
#include <assert.h>
#include <cbmem.h>
-#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/smm.h>
#include <device/pci.h>
diff --git a/src/soc/intel/common/block/chip/chip.c b/src/soc/intel/common/block/chip/chip.c
index 5ab8f6b07d05..6551e9182a35 100644
--- a/src/soc/intel/common/block/chip/chip.c
+++ b/src/soc/intel/common/block/chip/chip.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <console/console.h>
#include <soc/pci_devs.h>
#include <soc/soc_chip.h>
diff --git a/src/soc/intel/fsp_broadwell_de/smbus-imc.c b/src/soc/intel/fsp_broadwell_de/smbus-imc.c
index 35e42da40931..61dc080c507f 100644
--- a/src/soc/intel/fsp_broadwell_de/smbus-imc.c
+++ b/src/soc/intel/fsp_broadwell_de/smbus-imc.c
@@ -14,7 +14,6 @@
*/
#include <stddef.h>
-#include <console/console.h>
#include <device/pci_def.h>
#include <device/early_smbus.h>
#include <intelblocks/imc.h>
diff --git a/src/soc/mediatek/mt8183/dsi.c b/src/soc/mediatek/mt8183/dsi.c
index daa06caeaea6..604592f5cb75 100644
--- a/src/soc/mediatek/mt8183/dsi.c
+++ b/src/soc/mediatek/mt8183/dsi.c
@@ -15,7 +15,6 @@
#include <assert.h>
#include <device/mmio.h>
-#include <console/console.h>
#include <delay.h>
#include <soc/dsi.h>
#include <soc/pll.h>
diff --git a/src/soc/mediatek/mt8183/include/soc/spm.h b/src/soc/mediatek/mt8183/include/soc/spm.h
index 6ab964747086..3d8e5785b05f 100644
--- a/src/soc/mediatek/mt8183/include/soc/spm.h
+++ b/src/soc/mediatek/mt8183/include/soc/spm.h
@@ -17,7 +17,6 @@
#define SOC_MEDIATEK_MT8183_SPM_H
#include <arch/barrier.h>
-#include <console/console.h>
#include <soc/addressmap.h>
#include <stdint.h>
#include <types.h>
diff --git a/src/soc/qualcomm/qcs405/uart.c b/src/soc/qualcomm/qcs405/uart.c
index 3e980887db77..24045cd3889e 100644
--- a/src/soc/qualcomm/qcs405/uart.c
+++ b/src/soc/qualcomm/qcs405/uart.c
@@ -30,7 +30,6 @@
#include <device/mmio.h>
#include <boot/coreboot_tables.h>
-#include <console/console.h>
#include <console/uart.h>
#include <delay.h>
#include <gpio.h>
diff --git a/src/soc/qualcomm/sdm845/qclib.c b/src/soc/qualcomm/sdm845/qclib.c
index 9c05452c9e7a..ae7251a12cbd 100644
--- a/src/soc/qualcomm/sdm845/qclib.c
+++ b/src/soc/qualcomm/sdm845/qclib.c
@@ -15,7 +15,6 @@
#include <cbfs.h>
#include <fmap.h>
-#include <console/console.h>
#include <soc/symbols.h>
#include <soc/qclib_common.h>
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index df9fdefec195..d8fd7ad6a5c5 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -21,7 +21,6 @@
#include <southbridge/intel/common/gpio.h>
#include <southbridge/intel/common/pmbase.h>
#include <southbridge/intel/common/rcba.h>
-#include <console/console.h>
/* For DMI bar. */
#include <northbridge/intel/sandybridge/sandybridge.h>
diff --git a/src/southbridge/intel/i82801gx/pci.c b/src/southbridge/intel/i82801gx/pci.c
index d493b790a7f4..5ff9d38192c7 100644
--- a/src/southbridge/intel/i82801gx/pci.c
+++ b/src/southbridge/intel/i82801gx/pci.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/nvidia/ck804/early_setup_car.c b/src/southbridge/nvidia/ck804/early_setup_car.c
index e2cc40a986b7..d981b7e63dbf 100644
--- a/src/southbridge/nvidia/ck804/early_setup_car.c
+++ b/src/southbridge/nvidia/ck804/early_setup_car.c
@@ -17,7 +17,6 @@
*/
#include <arch/io.h>
-#include <console/console.h>
#include <device/pci_ops.h>
#include <reset.h>
#include <southbridge/amd/common/reset.h>