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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-07-20 12:30:23 -0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-07-22 02:20:18 +0000 |
| commit | c38347873ecea0e38c3fbf5f79f33f13b60dee90 (patch) | |
| tree | e7c73a74e3214dd1e1f3a08d76aabba8cc9489ac | |
| parent | 2a59875694a2dad4c41c75e5fe4445e697f1d6ee (diff) | |
| download | coreboot-c38347873ecea0e38c3fbf5f79f33f13b60dee90.tar.gz coreboot-c38347873ecea0e38c3fbf5f79f33f13b60dee90.tar.bz2 coreboot-c38347873ecea0e38c3fbf5f79f33f13b60dee90.zip | |
mb/google/brya/acpi: Poll more frequently in GPPL
The full dGPU power-on sequence, when executed from ACPI, is taking
roughly 15ms or so, which puts it close to the maximum of 20ms required
from the Nvidia spec. Changing the polling period to 100 us instead of 1
ms drastically reduces the time required for this sequence, now taking
typically 7 ms or so. This gives a lot more margin during the power on
sequence.
BUG=b:238466724
TEST=Sequence verified by EE on a scope
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I3ba676c5fac983a0c1ad1d60c3863d06ed33fa27
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66020
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
| -rw-r--r-- | src/mainboard/google/brya/acpi/utility.asl | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/acpi/utility.asl b/src/mainboard/google/brya/acpi/utility.asl index 1999d333481a..9cdfb49c41ba 100644 --- a/src/mainboard/google/brya/acpi/utility.asl +++ b/src/mainboard/google/brya/acpi/utility.asl @@ -9,14 +9,15 @@ Method (GPPL, 3, Serialized) { Local0 = 0 - While (Local0 < Arg2) + Local1 = Arg2 * 10 + While (Local0 < Local1) { If (\_SB.PCI0.GRXS (Arg0) == Arg1) { Return (0) } Else { Local0++ } - Sleep (1) + Stall (100) } If (Local0 == Arg2) { |