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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-20 12:31:23 +0300 |
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committer | Patrick Georgi <patrick@georgi-clan.de> | 2014-06-21 08:04:57 +0200 |
commit | c551caae56535b056be0440b08bd57e24459242c (patch) | |
tree | 3634d118a1aa2871cc7f77d6ed2ffde33b840f94 | |
parent | 8ae16a44a4a588c8ae81979634ddee681db4f804 (diff) | |
download | coreboot-c551caae56535b056be0440b08bd57e24459242c.tar.gz coreboot-c551caae56535b056be0440b08bd57e24459242c.tar.bz2 coreboot-c551caae56535b056be0440b08bd57e24459242c.zip |
AMD cimx/sb800: Use acpi_is_wakeup_s3()
Change-Id: If237c2fcd52f50d5fa0cad5a02a941386b085f2e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6077
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
-rw-r--r-- | src/northbridge/amd/agesa/family14/northbridge.c | 7 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb800/late.c | 6 |
2 files changed, 2 insertions, 11 deletions
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index ec07c1850655..7b6b4012739b 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -761,17 +761,12 @@ static void domain_enable_resources(device_t dev) u32 val; #if CONFIG_AMD_SB_CIMX - #if CONFIG_HAVE_ACPI_RESUME - if (acpi_slp_type != 3) { + if (!acpi_is_wakeup_s3()) { sb_After_Pci_Init(); sb_Mid_Post_Init(); } else { sb_After_Pci_Restore_Init(); } - #else - sb_After_Pci_Init(); - sb_Mid_Post_Init(); - #endif #endif /* Must be called after PCI enumeration and resource allocation */ diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index f4c5fd44e245..800060193007 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -498,14 +498,10 @@ static void sb800_enable(device_t dev) /* call the CIMX entry at the last sb800 device, * so make sure the mainboard devicetree is complete */ -#if CONFIG_HAVE_ACPI_RESUME - if (acpi_slp_type != 3) + if (!acpi_is_wakeup_s3()) sb_Before_Pci_Init(); else sb_Before_Pci_Restore_Init(); -#else - sb_Before_Pci_Init(); -#endif break; default: |