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| author | Elyes Haouas <ehaouas@noos.fr> | 2022-11-18 15:06:21 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-22 13:41:26 +0000 |
| commit | d369c662561402cba057bebf7c6e83d5a967a547 (patch) | |
| tree | 9e20e9e408fedbd90096620477b49fb536b7bf4e | |
| parent | 1ef547eec7262f96770f1fe4d1c6ff44b624dbe2 (diff) | |
| download | coreboot-d369c662561402cba057bebf7c6e83d5a967a547.tar.gz coreboot-d369c662561402cba057bebf7c6e83d5a967a547.tar.bz2 coreboot-d369c662561402cba057bebf7c6e83d5a967a547.zip | |
src/device/pci_: Remove unnecessary space after casts
Change-Id: I11593245fedc26489e3506d773aaff1ad34188b1
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69804
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/device/pci_device.c | 22 | ||||
| -rw-r--r-- | src/device/pci_rom.c | 8 |
2 files changed, 15 insertions, 15 deletions
diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 865158644c77..9de294698af3 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -108,7 +108,7 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index) PCI_BASE_ADDRESS_MEM_LIMIT_64)) { /* Find the high bits that move. */ moving |= - ((resource_t) pci_moving_config32(dev, index + 4)) << 32; + ((resource_t)pci_moving_config32(dev, index + 4)) << 32; } /* Find the resource constraints. @@ -496,13 +496,13 @@ static void pci_bridge_read_bases(struct device *dev) resource_t moving_base, moving_limit, moving; /* See if the bridge I/O resources are implemented. */ - moving_base = ((u32) pci_moving_config8(dev, PCI_IO_BASE)) << 8; + moving_base = ((u32)pci_moving_config8(dev, PCI_IO_BASE)) << 8; moving_base |= - ((u32) pci_moving_config16(dev, PCI_IO_BASE_UPPER16)) << 16; + ((u32)pci_moving_config16(dev, PCI_IO_BASE_UPPER16)) << 16; - moving_limit = ((u32) pci_moving_config8(dev, PCI_IO_LIMIT)) << 8; + moving_limit = ((u32)pci_moving_config8(dev, PCI_IO_LIMIT)) << 8; moving_limit |= - ((u32) pci_moving_config16(dev, PCI_IO_LIMIT_UPPER16)) << 16; + ((u32)pci_moving_config16(dev, PCI_IO_LIMIT_UPPER16)) << 16; moving = moving_base & moving_limit; @@ -511,14 +511,14 @@ static void pci_bridge_read_bases(struct device *dev) /* See if the bridge prefmem resources are implemented. */ moving_base = - ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_BASE)) << 16; + ((resource_t)pci_moving_config16(dev, PCI_PREF_MEMORY_BASE)) << 16; moving_base |= - ((resource_t) pci_moving_config32(dev, PCI_PREF_BASE_UPPER32)) << 32; + ((resource_t)pci_moving_config32(dev, PCI_PREF_BASE_UPPER32)) << 32; moving_limit = - ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_LIMIT)) << 16; + ((resource_t)pci_moving_config16(dev, PCI_PREF_MEMORY_LIMIT)) << 16; moving_limit |= - ((resource_t) pci_moving_config32(dev, PCI_PREF_LIMIT_UPPER32)) << 32; + ((resource_t)pci_moving_config32(dev, PCI_PREF_LIMIT_UPPER32)) << 32; moving = moving_base & moving_limit; /* Initialize the prefetchable memory constraints on the current bus. */ @@ -526,8 +526,8 @@ static void pci_bridge_read_bases(struct device *dev) IORESOURCE_MEM | IORESOURCE_PREFETCH); /* See if the bridge mem resources are implemented. */ - moving_base = ((u32) pci_moving_config16(dev, PCI_MEMORY_BASE)) << 16; - moving_limit = ((u32) pci_moving_config16(dev, PCI_MEMORY_LIMIT)) << 16; + moving_base = ((u32)pci_moving_config16(dev, PCI_MEMORY_BASE)) << 16; + moving_limit = ((u32)pci_moving_config16(dev, PCI_MEMORY_LIMIT)) << 16; moving = moving_base & moving_limit; diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c index b8dafd1bdd06..848062605631 100644 --- a/src/device/pci_rom.c +++ b/src/device/pci_rom.c @@ -159,10 +159,10 @@ struct rom_header *pci_rom_load(struct device *dev, do { /* Get next image. */ - rom_header = (struct rom_header *)((void *) rom_header + rom_header = (struct rom_header *)((void *)rom_header + image_size); - rom_data = (struct pci_data *)((void *) rom_header + rom_data = (struct pci_data *)((void *)rom_header + le32_to_cpu(rom_header->data)); image_size = le32_to_cpu(rom_data->ilen) * 512; @@ -190,7 +190,7 @@ struct rom_header *pci_rom_load(struct device *dev, memcpy((void *)PCI_VGA_RAM_IMAGE_START, rom_header, rom_size); } - return (struct rom_header *) (PCI_VGA_RAM_IMAGE_START); + return (struct rom_header *)(PCI_VGA_RAM_IMAGE_START); } printk(BIOS_DEBUG, "Copying non-VGA ROM image from %p to %p, 0x%x bytes\n", @@ -198,7 +198,7 @@ struct rom_header *pci_rom_load(struct device *dev, memcpy(pci_ram_image_start, rom_header, rom_size); pci_ram_image_start += rom_size; - return (struct rom_header *) (pci_ram_image_start-rom_size); + return (struct rom_header *)(pci_ram_image_start-rom_size); } /* ACPI */ |