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author | Nico Huber <nico.huber@secunet.com> | 2017-01-19 16:11:58 +0100 |
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committer | Martin Roth <martinroth@google.com> | 2017-01-24 18:04:58 +0100 |
commit | d37fa8d84dc368aa02fa28134f2b7a38d2e3cdf9 (patch) | |
tree | 567de6fe3a71bc8057afc68ecd0623a0aa92f4e0 | |
parent | 5f1f0538cf46cea122c49cc103771fd839d24b37 (diff) | |
download | coreboot-d37fa8d84dc368aa02fa28134f2b7a38d2e3cdf9.tar.gz coreboot-d37fa8d84dc368aa02fa28134f2b7a38d2e3cdf9.tar.bz2 coreboot-d37fa8d84dc368aa02fa28134f2b7a38d2e3cdf9.zip |
drivers/intel/gma/vbt: Fix style and minor issues
o Fix indentation and other whitespace issues,
o Use `const` where applicable,
o Avoid retyping the same constant literals,
o Actually read PCI revision from the device (instead of using the
lowest class byte).
Change-Id: I2c64153c61a51a6a87848360d22f981225812a3b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/18185
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
-rw-r--r-- | src/drivers/intel/gma/vbt.c | 83 |
1 files changed, 40 insertions, 43 deletions
diff --git a/src/drivers/intel/gma/vbt.c b/src/drivers/intel/gma/vbt.c index 430aa9bc391c..0d76afee48a5 100644 --- a/src/drivers/intel/gma/vbt.c +++ b/src/drivers/intel/gma/vbt.c @@ -19,42 +19,41 @@ #include <delay.h> #include <device/device.h> #include <string.h> -#include <device/pci_rom.h> +#include <device/pci.h> #include "i915.h" #include "intel_bios.h" -static size_t generate_vbt(const struct i915_gpu_controller_info *conf, - void *vbt, const char *idstr) +static size_t generate_vbt(const struct i915_gpu_controller_info *const conf, + struct vbt_header *const head, + const char *const idstr) { - struct vbt_header *head = vbt; - struct bdb_header *bdb_head; - struct bdb_general_features *genfeat; u8 *ptr; memset(head, 0, sizeof (*head)); - memset(head->signature, ' ', sizeof(head->signature)); - memcpy(head->signature, idstr, MIN(strlen(idstr), - sizeof(head->signature))); + memset(head->signature, ' ', sizeof (head->signature)); + memcpy(head->signature, idstr, + MIN(strlen(idstr), sizeof (head->signature))); head->version = 100; head->header_size = sizeof (*head); head->bdb_offset = sizeof (*head); - bdb_head = (struct bdb_header *) (head + 1); + struct bdb_header *const bdb_head = (struct bdb_header *)(head + 1); memset(bdb_head, 0, sizeof (*bdb_head)); memcpy(bdb_head->signature, "BIOS_DATA_BLOCK ", 16); bdb_head->version = 0xa8; bdb_head->header_size = sizeof (*bdb_head); - ptr = (u8 *) (bdb_head + 1); + ptr = (u8 *)(bdb_head + 1); ptr[0] = BDB_GENERAL_FEATURES; - ptr[1] = sizeof (*genfeat); - ptr[2] = sizeof (*genfeat) >> 8; + ptr[1] = sizeof (struct bdb_general_features); + ptr[2] = sizeof (struct bdb_general_features) >> 8; ptr += 3; - genfeat = (struct bdb_general_features *) ptr; + struct bdb_general_features *const genfeat = + (struct bdb_general_features *)ptr; memset(genfeat, 0, sizeof (*genfeat)); genfeat->panel_fitting = 3; genfeat->flexaim = 1; @@ -75,34 +74,32 @@ static size_t generate_vbt(const struct i915_gpu_controller_info *conf, } void -generate_fake_intel_oprom(const struct i915_gpu_controller_info *conf, - struct device *dev, const char *idstr) +generate_fake_intel_oprom(const struct i915_gpu_controller_info *const conf, + struct device *const dev, const char *const idstr) { - optionrom_header_t *oh = (void *)PCI_VGA_RAM_IMAGE_START; - optionrom_pcir_t *pcir; - size_t vbt_size; - size_t fake_oprom_size; - - memset(oh, 0, 8192); - - oh->signature = PCI_ROM_HDR; - oh->pcir_offset = 0x40; - oh->vbt_offset = 0x80; - - pcir = (void *)(PCI_VGA_RAM_IMAGE_START + 0x40); - pcir->signature = 0x52494350; // PCIR - pcir->vendor = dev->vendor; - pcir->device = dev->device; - pcir->length = sizeof(*pcir); - pcir->revision = dev->class; - pcir->classcode[0] = dev->class; - pcir->classcode[1] = dev->class >> 8; - pcir->classcode[2] = dev->class >> 16; - pcir->indicator = 0x80; - - vbt_size = generate_vbt (conf, (void *)(PCI_VGA_RAM_IMAGE_START + 0x80), idstr); - fake_oprom_size = (0x80 + vbt_size + 511) / 512; - oh->size = fake_oprom_size; - pcir->imagelength = fake_oprom_size; - + optionrom_header_t *const oh = (void *)PCI_VGA_RAM_IMAGE_START; + + memset(oh, 0, 8192); + + oh->signature = PCI_ROM_HDR; + oh->pcir_offset = 0x40; + oh->vbt_offset = 0x80; + + optionrom_pcir_t *const pcir = (void *)((u8 *)oh + oh->pcir_offset); + pcir->signature = 0x52494350; // PCIR + pcir->vendor = dev->vendor; + pcir->device = dev->device; + pcir->length = sizeof(*pcir); + pcir->revision = pci_read_config8(dev, PCI_CLASS_REVISION); + pcir->classcode[0] = dev->class; + pcir->classcode[1] = dev->class >> 8; + pcir->classcode[2] = dev->class >> 16; + pcir->indicator = 0x80; + + const size_t vbt_size = + generate_vbt(conf, (void *)((u8 *)oh + oh->vbt_offset), idstr); + const size_t fake_oprom_size = + DIV_ROUND_UP(oh->vbt_offset + vbt_size, 512); + oh->size = fake_oprom_size; + pcir->imagelength = fake_oprom_size; } |