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| author | Sergii Dmytruk <sergii.dmytruk@3mdeb.com> | 2024-04-07 20:53:54 +0300 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-04-10 07:24:16 +0000 |
| commit | e2dd36c6bcdd940cfacdfa5773b367164bc96429 (patch) | |
| tree | 980f9134866256c6372e3c5deee08d117db03953 | |
| parent | e6940c073334b8176d47af8b3aa6ca3de40b18de (diff) | |
| download | coreboot-e2dd36c6bcdd940cfacdfa5773b367164bc96429.tar.gz coreboot-e2dd36c6bcdd940cfacdfa5773b367164bc96429.tar.bz2 coreboot-e2dd36c6bcdd940cfacdfa5773b367164bc96429.zip | |
configs: enable TPM PPI for asrock_b85m_pro4.tpm2_txt_placeholder_acms
This is a good board for compiling TPM PPI sources for the following
reasons (based on `config TPM_PPI` definition):
- uses TPM
- the board is not related to ChromeOS
- ACPI tables are enabled
- it doesn't use EDK2 payload
At the moment drivers/tpm/ppi.c seems to not be compiled by CI at all,
see CB:69161 and CB:81590.
`CONFIG_TPM_PPI` is off by default but at least several configurations
under `configs/` (Protectli, MSI) should exercise the file because they
use EDK2 payload which changes default value. This is however negated
by abuild disabling all payloads and thus effectively preventing
`CONFIG_TPM_PPI` from being set. This board not using EDK2 also ensures
that `CONFIG_TPM_PPI=y` will not disappear after some future
`make savedefconfig`.
Change-Id: I316747a79b3142e9d6188c5986b344c7751d92d7
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81800
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | configs/config.asrock_b85m_pro4.tpm2_txt_placeholder_acms | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/configs/config.asrock_b85m_pro4.tpm2_txt_placeholder_acms b/configs/config.asrock_b85m_pro4.tpm2_txt_placeholder_acms index 4edeb0cc7bb3..da33450e01c7 100644 --- a/configs/config.asrock_b85m_pro4.tpm2_txt_placeholder_acms +++ b/configs/config.asrock_b85m_pro4.tpm2_txt_placeholder_acms @@ -1,8 +1,11 @@ # Known-working configuration to boot with TXT enabled. Since BIOS # and SINIT ACM blobs are missing, use something else as placeholder. # Used ACMs were extracted from a Supermicro X10SLH firmware update. +# +# CONFIG_TPM_PPI=y tests building PPI implementation. CONFIG_VENDOR_ASROCK=y CONFIG_BOARD_ASROCK_B85M_PRO4=y +CONFIG_TPM_PPI=y CONFIG_TPM2=y CONFIG_INTEL_TXT=y CONFIG_INTEL_TXT_BIOSACM_FILE="3rdparty/blobs/cpu/intel/stm/stm.bin" |