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| author | Peter Lemenkov <lemenkov@gmail.com> | 2021-06-17 10:49:26 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-06 19:12:30 +0000 |
| commit | e3a21bb749fac781d6f3c46b52fb83b9d5c90e5e (patch) | |
| tree | f423f3622dadc2f6661b712673e077c97c21c355 | |
| parent | 5f12455b8a029f862f7b2d51be624e948013cc0e (diff) | |
| download | coreboot-e3a21bb749fac781d6f3c46b52fb83b9d5c90e5e.tar.gz coreboot-e3a21bb749fac781d6f3c46b52fb83b9d5c90e5e.tar.bz2 coreboot-e3a21bb749fac781d6f3c46b52fb83b9d5c90e5e.zip | |
mb/lenovo: Use pci_and_config32
Change-Id: I082d31d59660c48065f9390975817d3ed553da2d
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55606
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
| -rw-r--r-- | src/mainboard/lenovo/t430s/variants/t430s/romstage.c | 5 | ||||
| -rw-r--r-- | src/mainboard/lenovo/t440p/romstage.c | 5 |
2 files changed, 2 insertions, 8 deletions
diff --git a/src/mainboard/lenovo/t430s/variants/t430s/romstage.c b/src/mainboard/lenovo/t430s/variants/t430s/romstage.c index efcd31558dd8..c6414863cebe 100644 --- a/src/mainboard/lenovo/t430s/variants/t430s/romstage.c +++ b/src/mainboard/lenovo/t430s/variants/t430s/romstage.c @@ -42,9 +42,6 @@ void mainboard_early_init(int s3resume) if (!enable_peg) { // Hide disabled dGPU device - u32 reg32 = pci_read_config32(PCI_DEV(0, 0, 0), DEVEN); - reg32 &= ~DEVEN_PEG10; - - pci_write_config32(PCI_DEV(0, 0, 0), DEVEN, reg32); + pci_and_config32(HOST_BRIDGE, DEVEN, ~DEVEN_PEG10); } } diff --git a/src/mainboard/lenovo/t440p/romstage.c b/src/mainboard/lenovo/t440p/romstage.c index e605453fffd0..8a7da158e35e 100644 --- a/src/mainboard/lenovo/t440p/romstage.c +++ b/src/mainboard/lenovo/t440p/romstage.c @@ -31,10 +31,7 @@ void mb_late_romstage_setup(void) if (!enable_peg) { // Hide disabled dGPU device - u32 reg32 = pci_read_config32(PCI_DEV(0, 0, 0), DEVEN); - reg32 &= ~DEVEN_D1F0EN; - - pci_write_config32(PCI_DEV(0, 0, 0), DEVEN, reg32); + pci_and_config32(HOST_BRIDGE, DEVEN, ~DEVEN_D1F0EN); } } |