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authorRaul E Rangel <rrangel@chromium.org>2021-06-24 16:54:27 -0600
committerRaul Rangel <rrangel@chromium.org>2021-07-02 23:11:16 +0000
commite92a9825587ac1c4c6133603354f711344e742dd (patch)
tree43c170c52db27e53fc04e425d88e8aef763922bf
parente19d0efb5e4f9d3a9c0053df8b86c31da3d47ae7 (diff)
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arch/x86: Add X86_CUSTOM_BOOTMEDIA
In order to disable X86_TOP4G_BOOTMEDIA_MAP it requires the definition to be overridden. This makes it a little less ergonomic to use. Instead introduce the inverse option that can be selected. I chose to leave X86_TOP4G_BOOTMEDIA_MAP since it keeps the Makefiles simple. BUG=b:179699789 TEST=none Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I65bbc118bde88687a7d7749c87acf1cbdc56a269 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55853 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
-rw-r--r--src/arch/x86/Kconfig10
-rw-r--r--src/soc/intel/apollolake/Kconfig9
-rw-r--r--src/soc/intel/common/block/fast_spi/Kconfig15
3 files changed, 14 insertions, 20 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index ef07a2a03a75..6af3fa8b694f 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -137,11 +137,15 @@ config RAMTOP
# Traditionally BIOS region on SPI flash boot media was memory mapped right below
# 4G and it was the last region in the IFD. This way translation between CPU
# address space to flash address was trivial. However some IFDs on newer SoCs
-# have BIOS region sandwiched between descriptor and other regions. Turning off
-# this option enables soc code to provide custom mmap_boot.c which can be used to
-# implement complex translation.
+# have BIOS region sandwiched between descriptor and other regions. Turning on
+# X86_CUSTOM_BOOTMEDIA disables X86_TOP4G_BOOTMEDIA_MAP which allows the
+# soc code to provide custom mmap_boot.c.
+config X86_CUSTOM_BOOTMEDIA
+ bool
+
config X86_TOP4G_BOOTMEDIA_MAP
bool
+ depends on !X86_CUSTOM_BOOTMEDIA
default y
# This is something you almost certainly don't want to mess with.
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index d81015e762eb..6395f16f7c03 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -112,6 +112,9 @@ config CPU_SPECIFIC_OPTIONS
select INTEL_GMA_ACPI
select INTEL_GMA_SWSMISCI
select HAVE_ASAN_IN_ROMSTAGE
+ # This SoC does not map SPI flash like many previous SoC. Therefore we
+ # provide a custom media driver that facilitates mapping
+ select X86_CUSTOM_BOOTMEDIA
config MAX_CPUS
int
@@ -173,12 +176,6 @@ config C_ENV_BOOTBLOCK_SIZE
hex
default 0x8000
-# This SoC does not map SPI flash like many previous SoC. Therefore we provide
-# a custom media driver that facilitates mapping
-config X86_TOP4G_BOOTMEDIA_MAP
- bool
- default n
-
config ROMSTAGE_ADDR
hex
default 0xfef20000
diff --git a/src/soc/intel/common/block/fast_spi/Kconfig b/src/soc/intel/common/block/fast_spi/Kconfig
index eb2373ca8b58..9257bde0f5d3 100644
--- a/src/soc/intel/common/block/fast_spi/Kconfig
+++ b/src/soc/intel/common/block/fast_spi/Kconfig
@@ -15,6 +15,10 @@ config FAST_SPI_DISABLE_WRITE_STATUS
config FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW
bool
depends on SOC_INTEL_COMMON_BLOCK_FAST_SPI
+ # Enable X86_CUSTOM_BOOTMEDIA because the fast SPI controller
+ # driver provides a custom boot media device when multiple decode
+ # windows are used for the BIOS region.
+ select X86_CUSTOM_BOOTMEDIA
help
Fast SPI controller on the platform supports additional
window for memory mapping BIOS region (region 1) on the SPI
@@ -45,14 +49,3 @@ config EXT_BIOS_WIN_SIZE
Maximum size of the extended window reserved for mapping BIOS
region greater than 16MiB. The actual mapped window might be
smaller depending upon the size of the BIOS region.
-
-if FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW
-
-# Disable X86_TOP4G_BOOTMEDIA_MAP because the fast SPI controller
-# driver provides a custom boot media device when multiple decode
-# windows are used for the BIOS region.
-
-config X86_TOP4G_BOOTMEDIA_MAP
- default n
-
-endif