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authorMichael Niewöhner <foss@mniewoehner.de>2020-12-21 17:09:08 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2021-01-21 18:13:19 +0000
commitf31c2f2b7a27fbb2d8a26125f3d1852c821ea0b7 (patch)
treec4119fd83ea21d42d056a3ce8bc89d78b1de87a0
parent17721be11a64b82d1d2bb4165bd3bf8380016fdf (diff)
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mb/up/squared: do LPC/eSPI pad configuration at board-level
Do LPC/eSPI pad configuration at board-level to match other platforms by adding an appropriate early gpio table in the bootblock. The soc code gets dropped in CB:49410. Change-Id: If0693a4419c58dde3c4536698940f03c30304b9d Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49414 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/up/squared/bootblock.c6
-rw-r--r--src/mainboard/up/squared/gpio.h5
-rw-r--r--src/mainboard/up/squared/gpio_early.h39
3 files changed, 48 insertions, 2 deletions
diff --git a/src/mainboard/up/squared/bootblock.c b/src/mainboard/up/squared/bootblock.c
index fdaaaa182bde..58064a1b2f70 100644
--- a/src/mainboard/up/squared/bootblock.c
+++ b/src/mainboard/up/squared/bootblock.c
@@ -1,9 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h>
-#include <intelblocks/lpc_lib.h>
+#include <intelblocks/gpio.h>
+
+#include "gpio_early.h"
void bootblock_mainboard_init(void)
{
- lpc_configure_pads();
+ gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
}
diff --git a/src/mainboard/up/squared/gpio.h b/src/mainboard/up/squared/gpio.h
index 318267505225..037fa3560976 100644
--- a/src/mainboard/up/squared/gpio.h
+++ b/src/mainboard/up/squared/gpio.h
@@ -725,6 +725,11 @@ static const struct pad_config gpio_table[] = {
/* SMB_DATA - SMB_DATA */
PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_DATA, UP_20K, DEEP, NF1),
+ /*
+ * LPC
+ * Note: It's unconfirmed if this redundancy to the bootblock table is necessary.
+ */
+
/* LPC_ILB_SERIRQ - LPC_ILB_SERIRQ */
PAD_CFG_NF_IOSTANDBY_IGNORE(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1),
diff --git a/src/mainboard/up/squared/gpio_early.h b/src/mainboard/up/squared/gpio_early.h
new file mode 100644
index 000000000000..fc7e7e857692
--- /dev/null
+++ b/src/mainboard/up/squared/gpio_early.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/gpio.h>
+
+#ifndef CFG_GPIO_EARLY_H
+#define CFG_GPIO_EARLY_H
+
+static const struct pad_config early_gpio_table[] = {
+ /* ------- GPIO Group South-West ------- */
+
+ /* LPC_ILB_SERIRQ - LPC_ILB_SERIRQ */
+ PAD_CFG_NF_IOSTANDBY_IGNORE(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1),
+
+ /* LPC_CLKOUT0 - LPC_CLKOUT0 */
+ PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT0, NONE, DEEP, NF1, HIZCRx1, DISPUPD),
+
+ /* LPC_CLKOUT1 - LPC_CLKOUT1 */
+ PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT1, NONE, DEEP, NF1, HIZCRx1, DISPUPD),
+
+ /* LPC_AD0 - LPC_AD0 */
+ PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD0, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
+
+ /* LPC_AD1 - LPC_AD1 */
+ PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD1, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
+
+ /* LPC_AD2 - LPC_AD2 */
+ PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD2, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
+
+ /* LPC_AD3 - LPC_AD3 */
+ PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD3, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
+
+ /* LPC_CLKRUNB - LPC_CLKRUNB */
+ PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKRUNB, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
+
+ /* LPC_FRAMEB - LPC_FRAMEB */
+ PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_FRAMEB, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
+};
+
+#endif /* CFG_GPIO_EARLY_H */