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| author | Damien Zammit <damien@zamaudio.com> | 2016-01-18 16:29:42 +1100 |
|---|---|---|
| committer | Vladimir Serbinenko <phcoder@gmail.com> | 2016-01-18 15:08:33 +0100 |
| commit | f564606170a700b7d785d53bb20bab7d036b515a (patch) | |
| tree | e5f605398341ffa965267026739b343dbb433abb | |
| parent | a67526e61dcd4daf8311855a4b54eae7d63359a9 (diff) | |
| download | coreboot-f564606170a700b7d785d53bb20bab7d036b515a.tar.gz coreboot-f564606170a700b7d785d53bb20bab7d036b515a.tar.bz2 coreboot-f564606170a700b7d785d53bb20bab7d036b515a.zip | |
nb/intel/pineview: Fix decode_pciebar()
Fixes bug that decode_pciebar() function was bypassed due
to PCI_DEV(0,0,0) being detected as zero and function returning 0.
Change-Id: Ia79bcebbe3ba36f479cbb24dbbb163a031d9c099
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/13031
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
| -rw-r--r-- | src/northbridge/intel/pineview/ram_calc.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/northbridge/intel/pineview/ram_calc.c b/src/northbridge/intel/pineview/ram_calc.c index c273071182cb..af1ca72dbaf4 100644 --- a/src/northbridge/intel/pineview/ram_calc.c +++ b/src/northbridge/intel/pineview/ram_calc.c @@ -42,9 +42,6 @@ u8 decode_pciebar(u32 *const base, u32 *const len) {0, 0}, }; - if (!dev) - return 0; - pciexbar_reg = pci_read_config32(dev, PCIEXBAR); // MMCFG not supported or not enabled. |