soc/intel: Refactor fill_acpi_wake()

Change-Id: I7fcc2b36cfe57adf8ae3a6acf8b54e19504202a5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49878
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

5 files changed, 19 insertions, 23 deletions

diff --git a/src/soc/intel/braswell/ramstage.c b/src/soc/intel/braswell/ramstage.c
index f49c760588eb..1a77b80f1ed9 100644
--- a/src/soc/intel/braswell/ramstage.c
+++ b/src/soc/intel/braswell/ramstage.c
@@ -120,14 +120,10 @@ static void fill_in_pattrs(void)
 }
 
 /* Save wake source information for calculating ACPI _SWS values */
-int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0)
+int soc_fill_acpi_wake(const struct chipset_power_state *ps, uint32_t *pm1, uint32_t **gpe0)
 {
-	struct chipset_power_state *ps = acpi_get_pm_state();
 	static uint32_t gpe0_sts;
 
-	if (!ps)
-		return -1;
-
 	*pm1 = ps->pm1_sts & ps->pm1_en;
 
 	gpe0_sts = ps->gpe0_sts & ps->gpe0_en;
diff --git a/src/soc/intel/common/acpi.h b/src/soc/intel/common/acpi.h
index db12e81cd02d..efa0336f47b1 100644
--- a/src/soc/intel/common/acpi.h
+++ b/src/soc/intel/common/acpi.h
@@ -14,6 +14,6 @@
  * return the number of registers in the gpe0 array or -1 if nothing
  * is provided by this function.
  */
-int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0);
+int soc_fill_acpi_wake(const struct chipset_power_state *ps, uint32_t *pm1, uint32_t **gpe0);
 
 #endif /* _INTEL_COMMON_ACPI_H_ */
diff --git a/src/soc/intel/common/acpi_wake_source.c b/src/soc/intel/common/acpi_wake_source.c
index f30ef9f0dbf0..976e005b055b 100644
--- a/src/soc/intel/common/acpi_wake_source.c
+++ b/src/soc/intel/common/acpi_wake_source.c
@@ -2,13 +2,16 @@
 
 #include <acpi/acpi.h>
 #include <acpi/acpi_gnvs.h>
+#include <acpi/acpi_pm.h>
 #include <bootstate.h>
 #include <console/console.h>
 #include <soc/nvs.h>
+#include <soc/pm.h>
 #include <stdint.h>
 #include "acpi.h"
 
-__weak int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0)
+__weak int soc_fill_acpi_wake(const struct chipset_power_state *ps, uint32_t *pm1,
+			      uint32_t **gpe0)
 {
 	return -1;
 }
@@ -27,7 +30,11 @@ static void acpi_save_wake_source(void *unused)
 	gnvs->pm1i = -1;
 	gnvs->gpei = -1;
 
-	gpe_reg_count = soc_fill_acpi_wake(&pm1, &gpe0);
+	const struct chipset_power_state *ps = acpi_get_pm_state();
+	if (!ps)
+		return;
+
+	gpe_reg_count = soc_fill_acpi_wake(ps, &pm1, &gpe0);
 	if (gpe_reg_count < 0)
 		return;
 
diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c
index cbc6a58a38ad..e5d3fee33f15 100644
--- a/src/soc/intel/common/block/acpi/acpi.c
+++ b/src/soc/intel/common/block/acpi/acpi.c
@@ -202,21 +202,15 @@ uint32_t acpi_fill_soc_wake(uint32_t generic_pm1_en,
  * @pm1:  PM1_STS register with only enabled events set
  * @gpe0: GPE0_STS registers with only enabled events set
  *
- * return the number of registers in the gpe0 array or -1 if nothing
- * is provided by this function.
+ * return the number of registers in the gpe0 array
  */
 
-static int acpi_fill_wake(uint32_t *pm1, uint32_t **gpe0)
+static int acpi_fill_wake(const struct chipset_power_state *ps, uint32_t *pm1, uint32_t **gpe0)
 {
-	struct chipset_power_state *ps;
 	static uint32_t gpe0_sts[GPE0_REG_MAX];
 	uint32_t pm1_en;
 	int i;
 
-	ps = acpi_get_pm_state();
-	if (ps == NULL)
-		return -1;
-
 	/*
 	 * PM1_EN to check the basic wake events which can happen through
 	 * powerbtn or any other wake source like lidopen, key board press etc.
@@ -462,7 +456,11 @@ static void acpi_save_wake_source(void *unused)
 	gnvs->pm1i = -1;
 	gnvs->gpei = -1;
 
-	gpe_reg_count = acpi_fill_wake(&pm1, &gpe0);
+	const struct chipset_power_state *ps = acpi_get_pm_state();
+	if (!ps)
+		return;
+
+	gpe_reg_count = acpi_fill_wake(ps, &pm1, &gpe0);
 	if (gpe_reg_count < 0)
 		return;
 
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 3545a9425ed5..d62960dbe217 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -520,20 +520,15 @@ unsigned long southbridge_write_acpi_tables(const struct device *device,
 }
 
 /* Save wake source information for calculating ACPI _SWS values */
-int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0)
+int soc_fill_acpi_wake(const struct chipset_power_state *ps, uint32_t *pm1, uint32_t **gpe0)
 {
 	const struct soc_intel_skylake_config *config = config_of_soc();
-	struct chipset_power_state *ps;
 	static uint32_t gpe0_sts[GPE0_REG_MAX];
 	uint32_t pm1_en;
 	uint32_t gpe0_std;
 	int i;
 	const int last_index = GPE0_REG_MAX - 1;
 
-	ps = acpi_get_pm_state();
-	if (ps == NULL)
-		return -1;
-
 	pm1_en = ps->pm1_en;
 	gpe0_std = ps->gpe0_en[3];