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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-09-21 12:56:02 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-09-26 14:21:37 +0000 |
| commit | 72bae5b9bd10a90c59d14c063c6ab58f216ddf81 (patch) | |
| tree | 994f0eae893d334dee2b984b19c51a42d28e7027 /Documentation/drivers | |
| parent | 25cc4a210dbfd82e8e25b97859f09b301213b6b2 (diff) | |
| download | coreboot-72bae5b9bd10a90c59d14c063c6ab58f216ddf81.tar.gz coreboot-72bae5b9bd10a90c59d14c063c6ab58f216ddf81.tar.bz2 coreboot-72bae5b9bd10a90c59d14c063c6ab58f216ddf81.zip | |
mb/google/brya/var/agah: Explicitly program GPP_H13 in ramstage
In order that GPP_H13 not use the GPIO override programming from its
baseboard (brya), explicitly program GPP_H13 to a output HIGH instead
of relying on the 20K pullup from the baseboard.
BUG=b:240617195
TEST=SSD still functional
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Iddedebe2d5cfc0123932b14980d1268bcb147703
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67766
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Diffstat (limited to 'Documentation/drivers')
0 files changed, 0 insertions, 0 deletions